diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 8e9933c..75b2c98 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -738,7 +738,7 @@
                                      const TargetRegisterInfo *RegInfo,
                                      bool AddIfNotFound) {
   bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
-  bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
+  bool Found = false;
   SmallVector<unsigned,4> DeadOps;
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
     MachineOperand &MO = getOperand(i);
@@ -749,15 +749,15 @@
       continue;
 
     if (Reg == IncomingReg) {
-      MO.setIsKill();
-      return true;
-    }
-    if (hasAliases && MO.isKill() &&
-        TargetRegisterInfo::isPhysicalRegister(Reg)) {
+      if (!Found)  // One kill of reg per instruction.
+        MO.setIsKill();
+      Found = true;
+    } else if (isPhysReg && MO.isKill() &&
+               TargetRegisterInfo::isPhysicalRegister(Reg)) {
       // A super-register kill already exists.
       if (RegInfo->isSuperRegister(IncomingReg, Reg))
-        return true;
-      if (RegInfo->isSubRegister(IncomingReg, Reg))
+        Found = true;
+      else if (RegInfo->isSubRegister(IncomingReg, Reg))
         DeadOps.push_back(i);
     }
   }
@@ -774,14 +774,14 @@
 
   // If not found, this means an alias of one of the operands is killed. Add a
   // new implicit operand if required.
-  if (AddIfNotFound) {
+  if (!Found && AddIfNotFound) {
     addOperand(MachineOperand::CreateReg(IncomingReg,
                                          false /*IsDef*/,
                                          true  /*IsImp*/,
                                          true  /*IsKill*/));
     return true;
   }
-  return false;
+  return Found;
 }
 
 bool MachineInstr::addRegisterDead(unsigned IncomingReg,
@@ -789,6 +789,7 @@
                                    bool AddIfNotFound) {
   bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg);
   bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg);
+  bool Found = false;
   SmallVector<unsigned,4> DeadOps;
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
     MachineOperand &MO = getOperand(i);
@@ -797,14 +798,13 @@
     unsigned Reg = MO.getReg();
     if (Reg == IncomingReg) {
       MO.setIsDead();
-      return true;
-    }
-    if (hasAliases && MO.isDead() &&
-        TargetRegisterInfo::isPhysicalRegister(Reg)) {
+      Found = true;
+    } else if (hasAliases && MO.isDead() &&
+               TargetRegisterInfo::isPhysicalRegister(Reg)) {
       // There exists a super-register that's marked dead.
       if (RegInfo->isSuperRegister(IncomingReg, Reg))
-        return true;
-      if (RegInfo->isSubRegister(IncomingReg, Reg))
+        Found = true;
+      else if (RegInfo->isSubRegister(IncomingReg, Reg))
         DeadOps.push_back(i);
     }
   }
@@ -821,13 +821,13 @@
 
   // If not found, this means an alias of one of the operand is dead. Add a
   // new implicit operand.
-  if (AddIfNotFound) {
+  if (!Found && AddIfNotFound) {
     addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/,
                                          true/*IsImp*/,false/*IsKill*/,
                                          true/*IsDead*/));
     return true;
   }
-  return false;
+  return Found;
 }
 
 /// copyKillDeadInfo - copies killed/dead information from one instr to another