commit 1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3
author Matt Arsenault <Matthew.Arsenault@amd.com> Wed Sep 14 20:43:16 2016 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Wed Sep 14 20:43:16 2016 +0000
tree 27b082ad9831ad1d7dbddbd99b4c07e76e1db43e
parent 0ac172d8ede295c30946f6af2dafb68c7c7aa201

Finish renaming remaining analyzeBranch functions

llvm-svn: 281535

llvm/lib/Target/MSP430/MSP430InstrInfo.cpp

diff --git a/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp b/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
index f7200f8..6135ce0 100644
--- a/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
+++ b/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
@@ -104,7 +104,7 @@
     .addReg(SrcReg, getKillRegState(KillSrc));
 }
 
-unsigned MSP430InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
+unsigned MSP430InstrInfo::removeBranch(MachineBasicBlock &MBB,
                                        int *BytesRemoved) const {
   assert(!BytesRemoved && "code size not handled");
 
@@ -130,7 +130,7 @@
 }
 
 bool MSP430InstrInfo::
-ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
+reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 1 && "Invalid Xbranch condition!");
 
   MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm());