[llvm-objdump] Support detection of feature bits from the object and implement this for Mips.
Summary:
The Mips implementation only covers the feature bits described by the ELF
e_flags so far. Mips stores additional feature bits such as MSA in the
.MIPS.abiflags section.
Also fixed a small bug this revealed where microMIPS wouldn't add the
EF_MIPS_MICROMIPS flag when using -filetype=obj.
Reviewers: echristo, rafael
Subscribers: rafael, mehdi_amini, dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D21125
llvm-svn: 272880
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll
index 9fe694b..651fb6a 100644
--- a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll
+++ b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll
@@ -1,5 +1,5 @@
; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \
-; RUN: | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s
+; RUN: | llvm-objdump -d - | FileCheck %s
; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used.
diff --git a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
index e4a2282..f6fef90 100644
--- a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
+++ b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll
@@ -1,5 +1,6 @@
; RUN: llc -march=mipsel -mcpu=mips32r6 -disable-mips-delay-filler < %s | FileCheck %s
-; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s -filetype=obj -o - | llvm-objdump -arch=mips -mcpu=mips32r6 -d - | FileCheck %s -check-prefix=ENCODING
+; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s \
+; RUN: -filetype=obj -o - | llvm-objdump -d - | FileCheck %s -check-prefix=ENCODING
; bnezc and beqzc have restriction that $rt != 0
diff --git a/llvm/test/CodeGen/Mips/micromips-atomic1.ll b/llvm/test/CodeGen/Mips/micromips-atomic1.ll
index 37c3d76..d7c66c2 100644
--- a/llvm/test/CodeGen/Mips/micromips-atomic1.ll
+++ b/llvm/test/CodeGen/Mips/micromips-atomic1.ll
@@ -1,6 +1,5 @@
; RUN: llc -march=mipsel -filetype=obj --disable-machine-licm -mattr=micromips < %s -o - \
-; RUN: | llvm-objdump -no-show-raw-insn -arch mipsel -mcpu=mips32r2 -mattr=micromips -d - \
-; RUN: | FileCheck %s -check-prefix=MICROMIPS
+; RUN: | llvm-objdump -no-show-raw-insn -d - | FileCheck %s -check-prefix=MICROMIPS
; Use llvm-objdump to check wheter the encodings of microMIPS atomic instructions are correct.
; While emitting assembly files directly when in microMIPS mode, it is possible to emit a mips32r2
diff --git a/llvm/test/MC/Mips/cpload.s b/llvm/test/MC/Mips/cpload.s
index 842e0c7..3bbad60 100644
--- a/llvm/test/MC/Mips/cpload.s
+++ b/llvm/test/MC/Mips/cpload.s
@@ -1,16 +1,13 @@
# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM
#
-# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+o32 -filetype=obj -o -| \
-# RUN: llvm-objdump -d -r -arch=mips - | \
-# RUN: FileCheck %s -check-prefix=OBJ-O32
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \
+# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-O32
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -target-abi n32 -filetype=obj -o -| \
-# RUN: llvm-objdump -d -r -arch=mips - | \
-# RUN: FileCheck %s -check-prefix=OBJ-N32
+# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-N32
-# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+n64 -filetype=obj -o -| \
-# RUN: llvm-objdump -d -r -arch=mips - | \
-# RUN: FileCheck %s -check-prefix=OBJ-N64
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \
+# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-N64
# ASM: .text
# ASM: .option pic2
diff --git a/llvm/test/MC/Mips/cprestore-noreorder-noat.s b/llvm/test/MC/Mips/cprestore-noreorder-noat.s
index 25ceac1..07c4dd2 100644
--- a/llvm/test/MC/Mips/cprestore-noreorder-noat.s
+++ b/llvm/test/MC/Mips/cprestore-noreorder-noat.s
@@ -12,8 +12,7 @@
# RUN: FileCheck %s -check-prefix=NO-STORE
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \
-# RUN: llvm-objdump -d -r - | \
-# RUN: FileCheck %s -check-prefix=NO-STORE
+# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=NO-STORE
.text
.ent foo
diff --git a/llvm/test/MC/Mips/cprestore-noreorder.s b/llvm/test/MC/Mips/cprestore-noreorder.s
index 1d19974..6740ad9 100644
--- a/llvm/test/MC/Mips/cprestore-noreorder.s
+++ b/llvm/test/MC/Mips/cprestore-noreorder.s
@@ -2,8 +2,7 @@
# RUN: FileCheck %s
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \
-# RUN: llvm-objdump -d -r -arch=mips - | \
-# RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE
+# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=CHECK-FOR-STORE
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \
# RUN: FileCheck %s -check-prefix=MICROMIPS
diff --git a/llvm/test/MC/Mips/cprestore-reorder.s b/llvm/test/MC/Mips/cprestore-reorder.s
index eeb4e8e..a7fae25 100644
--- a/llvm/test/MC/Mips/cprestore-reorder.s
+++ b/llvm/test/MC/Mips/cprestore-reorder.s
@@ -2,8 +2,7 @@
# RUN: FileCheck %s
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \
-# RUN: llvm-objdump -d -r -arch=mips - | \
-# RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE
+# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=CHECK-FOR-STORE
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \
# RUN: FileCheck %s -check-prefix=MICROMIPS
diff --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s
index 255c1f6..f858b21 100644
--- a/llvm/test/MC/Mips/cpsetup.s
+++ b/llvm/test/MC/Mips/cpsetup.s
@@ -1,20 +1,19 @@
-# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 -filetype=obj -o - %s | \
-# RUN: llvm-objdump -d -r -arch=mips64 - | \
-# RUN: FileCheck -check-prefix=ALL -check-prefix=O32 %s
+# RUN: llvm-mc -triple mips64-unknown-linux -target-abi o32 -filetype=obj -o - %s | \
+# RUN: llvm-objdump -d -r - | FileCheck -check-prefix=ALL -check-prefix=O32 %s
# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 %s | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
-# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 -filetype=obj -o - %s | \
-# RUN: llvm-objdump -d -r -arch=mips64 - | \
-# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s
+# RUN: llvm-mc -triple mips64-unknown-linux -target-abi n32 -filetype=obj -o - %s | \
+# RUN: llvm-objdump -d -r - | \
+# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s
# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 %s | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
-# RUN: llvm-mc -triple mips64-unknown-unknown %s -filetype=obj -o - | \
-# RUN: llvm-objdump -d -r -arch=mips64 - | \
-# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s
+# RUN: llvm-mc -triple mips64-unknown-linux %s -filetype=obj -o - | \
+# RUN: llvm-objdump -d -r - | \
+# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s
# RUN: llvm-mc -triple mips64-unknown-unknown %s | \
# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
diff --git a/llvm/test/MC/Mips/micromips-el-fixup-data.s b/llvm/test/MC/Mips/micromips-el-fixup-data.s
index 34eb7f8..aa85838 100644
--- a/llvm/test/MC/Mips/micromips-el-fixup-data.s
+++ b/llvm/test/MC/Mips/micromips-el-fixup-data.s
@@ -1,6 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \
# RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o
-# RUN: llvm-objdump %t.o -mattr=+micromips -d | FileCheck %s
+# RUN: llvm-objdump %t.o -d | FileCheck %s
# Check that fixup data is written in the microMIPS specific little endian
# byte order.
diff --git a/llvm/test/MC/Mips/mips64extins.ll b/llvm/test/MC/Mips/mips64extins.ll
deleted file mode 100644
index f29e1f6..0000000
--- a/llvm/test/MC/Mips/mips64extins.ll
+++ /dev/null
@@ -1,56 +0,0 @@
-; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
-; RUN: | llvm-objdump -disassemble -mattr +mips64r2 - | FileCheck %s
-
-define i64 @dext(i64 %i) nounwind readnone {
-entry:
-; CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
- %shr = lshr i64 %i, 5
- %and = and i64 %shr, 1023
- ret i64 %and
-}
-
-define i64 @dextu(i64 %i) nounwind readnone {
-entry:
-; CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
- %shr = lshr i64 %i, 34
- %and = and i64 %shr, 63
- ret i64 %and
-}
-
-define i64 @dextm(i64 %i) nounwind readnone {
-entry:
-; CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
- %shr = lshr i64 %i, 5
- %and = and i64 %shr, 17179869183
- ret i64 %and
-}
-
-define i64 @dins(i64 %i, i64 %j) nounwind readnone {
-entry:
-; CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
- %shl2 = shl i64 %j, 8
- %and = and i64 %shl2, 261888
- %and3 = and i64 %i, -261889
- %or = or i64 %and3, %and
- ret i64 %or
-}
-
-define i64 @dinsm(i64 %i, i64 %j) nounwind readnone {
-entry:
-; CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1
- %shl4 = shl i64 %j, 10
- %and = and i64 %shl4, 8796093021184
- %and5 = and i64 %i, -8796093021185
- %or = or i64 %and5, %and
- ret i64 %or
-}
-
-define i64 @dinsu(i64 %i, i64 %j) nounwind readnone {
-entry:
-; CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13
- %shl4 = shl i64 %j, 40
- %and = and i64 %shl4, 9006099743113216
- %and5 = and i64 %i, -9006099743113217
- %or = or i64 %and5, %and
- ret i64 %or
-}
diff --git a/llvm/test/MC/Mips/mips64extins.s b/llvm/test/MC/Mips/mips64extins.s
new file mode 100644
index 0000000..3f1973b
--- /dev/null
+++ b/llvm/test/MC/Mips/mips64extins.s
@@ -0,0 +1,9 @@
+# RUN: llvm-mc -arch=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
+# RUN: | llvm-objdump -disassemble - | FileCheck %s
+
+ dext $2, $4, 5, 10 # CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
+ dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
+ dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
+ dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
+ dinsm $4, $5, 10, 1 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1
+ dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13
diff --git a/llvm/test/MC/Mips/mips_gprel16.s b/llvm/test/MC/Mips/mips_gprel16.s
index 9f2d100..a6e09c6 100644
--- a/llvm/test/MC/Mips/mips_gprel16.s
+++ b/llvm/test/MC/Mips/mips_gprel16.s
@@ -4,11 +4,9 @@
// field.
// RUN: llvm-mc -mcpu=mips32r2 -triple=mipsel-pc-linux -filetype=obj %s -o - \
-// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \
-// RUN: | FileCheck %s
+// RUN: | llvm-objdump -disassemble - | FileCheck %s
// RUN: llvm-mc -mcpu=mips32r2 -triple=mips-pc-linux -filetype=obj %s -o - \
-// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \
-// RUN: | FileCheck %s
+// RUN: | llvm-objdump -disassemble - | FileCheck %s
.text
.abicalls
diff --git a/llvm/test/MC/Mips/set-defined-symbol.s b/llvm/test/MC/Mips/set-defined-symbol.s
index 54db45d..2098877 100644
--- a/llvm/test/MC/Mips/set-defined-symbol.s
+++ b/llvm/test/MC/Mips/set-defined-symbol.s
@@ -1,5 +1,5 @@
# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \
-# RUN: llvm-objdump -d -r -arch=mips - | FileCheck %s
+# RUN: llvm-objdump -d -r - | FileCheck %s
.global foo
.weak bar
diff --git a/llvm/test/Object/Mips/feature.test b/llvm/test/Object/Mips/feature.test
index e4d81a1..dc0e7ad 100644
--- a/llvm/test/Object/Mips/feature.test
+++ b/llvm/test/Object/Mips/feature.test
@@ -1,3 +1,4 @@
+RUN: llvm-objdump -disassemble %p/../Inputs/dext-test.elf-mips64r2 | FileCheck %s
RUN: llvm-objdump -disassemble -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \
RUN: | FileCheck %s
diff --git a/llvm/test/Object/Mips/objdump-micro-mips.test b/llvm/test/Object/Mips/objdump-micro-mips.test
index 0f28dc1..6264d95 100644
--- a/llvm/test/Object/Mips/objdump-micro-mips.test
+++ b/llvm/test/Object/Mips/objdump-micro-mips.test
@@ -1,3 +1,4 @@
+RUN: llvm-objdump -d %p/../Inputs/micro-mips.elf-mipsel | FileCheck %s
RUN: llvm-objdump -d -mattr=micromips %p/../Inputs/micro-mips.elf-mipsel \
RUN: | FileCheck %s