commit 1ed771f5d7e68c868807f3b59e18f36dd50b0fbf
author Sanjay Patel <spatel@rotateright.com> Wed Sep 14 16:37:15 2016 +0000
committer Sanjay Patel <spatel@rotateright.com> Wed Sep 14 16:37:15 2016 +0000
tree 34e0f93dcb6c1ef93d20f2b037cb470f8634215c
parent d10a5ea19ece4b5d77fb548c04b782966de873a7

getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI

llvm-svn: 281495

llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp

diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 9ec5800..41ae785 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -1309,7 +1309,7 @@
 
   case ISD::INSERT_VECTOR_ELT: {
     EVT VT = Node->getValueType(0);
-    unsigned ElemBitSize = VT.getVectorElementType().getSizeInBits();
+    unsigned ElemBitSize = VT.getScalarSizeInBits();
     if (ElemBitSize == 32) {
       if (tryGather(Node, SystemZ::VGEF))
         return;