commit 1f8ad4f4a7ab9e7a4118b548396500a737f0ea44
author Eric Christopher <echristo@gmail.com> Tue Jun 10 22:34:28 2014 +0000
committer Eric Christopher <echristo@gmail.com> Tue Jun 10 22:34:28 2014 +0000
tree 6f8ad7744960109d93ad0dadc91d8f90a92bb227
parent 20e8edf5c76ff76aeca5ace0b32b5d041bbaf7a5

Move X86RegisterInfo away from using the TargetMachine and only
using the subtarget.

llvm-svn: 210595

llvm/lib/Target/X86/X86InstrInfo.cpp

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 03bd544..88732b5 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -105,7 +105,7 @@
                     (tm.getSubtarget<X86Subtarget>().is64Bit()
                      ? X86::ADJCALLSTACKUP64
                      : X86::ADJCALLSTACKUP32)),
-    TM(tm), RI(tm) {
+    TM(tm), RI(tm.getSubtarget<X86Subtarget>()) {
 
   static const X86OpTblEntry OpTbl2Addr[] = {
     { X86::ADC32ri,     X86::ADC32mi,    0 },