[AMDGPU][MC][DOC] A fix for build failure in r349370

llvm-svn: 349375
diff --git a/llvm/docs/AMDGPU/gfx7_attr.rst b/llvm/docs/AMDGPU/gfx7_attr.rst
index 13096f2..219b774 100644
--- a/llvm/docs/AMDGPU/gfx7_attr.rst
+++ b/llvm/docs/AMDGPU/gfx7_attr.rst
@@ -23,7 +23,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     v_interp_p1_f32 v1, v0, attr0.x
     v_interp_p1_f32 v1, v0, attr32.w
diff --git a/llvm/docs/AMDGPU/gfx7_hwreg.rst b/llvm/docs/AMDGPU/gfx7_hwreg.rst
index 1b0c542..1e2d964 100644
--- a/llvm/docs/AMDGPU/gfx7_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx7_hwreg.rst
@@ -51,7 +51,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_getreg_b32 s2, 0x6
     s_getreg_b32 s2, hwreg(15)
diff --git a/llvm/docs/AMDGPU/gfx7_label.rst b/llvm/docs/AMDGPU/gfx7_label.rst
index e0153e7..ed2f3a41 100644
--- a/llvm/docs/AMDGPU/gfx7_label.rst
+++ b/llvm/docs/AMDGPU/gfx7_label.rst
@@ -20,7 +20,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
   offset = 30
   s_branch loop_end
diff --git a/llvm/docs/AMDGPU/gfx7_msg.rst b/llvm/docs/AMDGPU/gfx7_msg.rst
index ad5fd7f..5476053 100644
--- a/llvm/docs/AMDGPU/gfx7_msg.rst
+++ b/llvm/docs/AMDGPU/gfx7_msg.rst
@@ -60,7 +60,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_sendmsg 0x12
     s_sendmsg sendmsg(MSG_INTERRUPT)
diff --git a/llvm/docs/AMDGPU/gfx7_src_exp.rst b/llvm/docs/AMDGPU/gfx7_src_exp.rst
index 6d155a5..32f71a8 100644
--- a/llvm/docs/AMDGPU/gfx7_src_exp.rst
+++ b/llvm/docs/AMDGPU/gfx7_src_exp.rst
@@ -19,7 +19,7 @@
 
 An example:
 
-.. code-block:: nasm
+.. parsed-literal::
 
   exp mrtz v3, v3, off, off compr
 
diff --git a/llvm/docs/AMDGPU/gfx7_waitcnt.rst b/llvm/docs/AMDGPU/gfx7_waitcnt.rst
index c89a320..3f5e07d 100644
--- a/llvm/docs/AMDGPU/gfx7_waitcnt.rst
+++ b/llvm/docs/AMDGPU/gfx7_waitcnt.rst
@@ -44,7 +44,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_waitcnt 0
     s_waitcnt vmcnt(1)
diff --git a/llvm/docs/AMDGPU/gfx8_attr.rst b/llvm/docs/AMDGPU/gfx8_attr.rst
index 3f28033..12fa2cd 100644
--- a/llvm/docs/AMDGPU/gfx8_attr.rst
+++ b/llvm/docs/AMDGPU/gfx8_attr.rst
@@ -23,7 +23,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     v_interp_p1_f32 v1, v0, attr0.x
     v_interp_p1_f32 v1, v0, attr32.w
diff --git a/llvm/docs/AMDGPU/gfx8_hwreg.rst b/llvm/docs/AMDGPU/gfx8_hwreg.rst
index d9b4299..ffa1ea5 100644
--- a/llvm/docs/AMDGPU/gfx8_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx8_hwreg.rst
@@ -51,7 +51,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_getreg_b32 s2, 0x6
     s_getreg_b32 s2, hwreg(15)
diff --git a/llvm/docs/AMDGPU/gfx8_label.rst b/llvm/docs/AMDGPU/gfx8_label.rst
index af63ad9..99e384e 100644
--- a/llvm/docs/AMDGPU/gfx8_label.rst
+++ b/llvm/docs/AMDGPU/gfx8_label.rst
@@ -20,7 +20,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
   offset = 30
   s_branch loop_end
diff --git a/llvm/docs/AMDGPU/gfx8_msg.rst b/llvm/docs/AMDGPU/gfx8_msg.rst
index 8140bc2..313d8e6 100644
--- a/llvm/docs/AMDGPU/gfx8_msg.rst
+++ b/llvm/docs/AMDGPU/gfx8_msg.rst
@@ -60,7 +60,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_sendmsg 0x12
     s_sendmsg sendmsg(MSG_INTERRUPT)
diff --git a/llvm/docs/AMDGPU/gfx8_src_exp.rst b/llvm/docs/AMDGPU/gfx8_src_exp.rst
index 92340c5..10449b4 100644
--- a/llvm/docs/AMDGPU/gfx8_src_exp.rst
+++ b/llvm/docs/AMDGPU/gfx8_src_exp.rst
@@ -19,7 +19,7 @@
 
 An example:
 
-.. code-block:: nasm
+.. parsed-literal::
 
   exp mrtz v3, v3, off, off compr
 
diff --git a/llvm/docs/AMDGPU/gfx8_waitcnt.rst b/llvm/docs/AMDGPU/gfx8_waitcnt.rst
index d164788..4bad594 100644
--- a/llvm/docs/AMDGPU/gfx8_waitcnt.rst
+++ b/llvm/docs/AMDGPU/gfx8_waitcnt.rst
@@ -44,7 +44,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_waitcnt 0
     s_waitcnt vmcnt(1)
diff --git a/llvm/docs/AMDGPU/gfx9_attr.rst b/llvm/docs/AMDGPU/gfx9_attr.rst
index c69589f..faffcc7 100644
--- a/llvm/docs/AMDGPU/gfx9_attr.rst
+++ b/llvm/docs/AMDGPU/gfx9_attr.rst
@@ -23,7 +23,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     v_interp_p1_f32 v1, v0, attr0.x
     v_interp_p1_f32 v1, v0, attr32.w
diff --git a/llvm/docs/AMDGPU/gfx9_hwreg.rst b/llvm/docs/AMDGPU/gfx9_hwreg.rst
index cecba1e..7ebb38b 100644
--- a/llvm/docs/AMDGPU/gfx9_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx9_hwreg.rst
@@ -52,7 +52,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_getreg_b32 s2, 0x6
     s_getreg_b32 s2, hwreg(15)
diff --git a/llvm/docs/AMDGPU/gfx9_label.rst b/llvm/docs/AMDGPU/gfx9_label.rst
index 09fde5e..3277172 100644
--- a/llvm/docs/AMDGPU/gfx9_label.rst
+++ b/llvm/docs/AMDGPU/gfx9_label.rst
@@ -20,7 +20,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
   offset = 30
   s_branch loop_end
diff --git a/llvm/docs/AMDGPU/gfx9_msg.rst b/llvm/docs/AMDGPU/gfx9_msg.rst
index 41cd7da..f18cff46 100644
--- a/llvm/docs/AMDGPU/gfx9_msg.rst
+++ b/llvm/docs/AMDGPU/gfx9_msg.rst
@@ -60,7 +60,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_sendmsg 0x12
     s_sendmsg sendmsg(MSG_INTERRUPT)
diff --git a/llvm/docs/AMDGPU/gfx9_src_exp.rst b/llvm/docs/AMDGPU/gfx9_src_exp.rst
index 71eaac0..91a5d53 100644
--- a/llvm/docs/AMDGPU/gfx9_src_exp.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_exp.rst
@@ -19,7 +19,7 @@
 
 An example:
 
-.. code-block:: nasm
+.. parsed-literal::
 
   exp mrtz v3, v3, off, off compr
 
diff --git a/llvm/docs/AMDGPU/gfx9_waitcnt.rst b/llvm/docs/AMDGPU/gfx9_waitcnt.rst
index 5f755fc..015a51a 100644
--- a/llvm/docs/AMDGPU/gfx9_waitcnt.rst
+++ b/llvm/docs/AMDGPU/gfx9_waitcnt.rst
@@ -45,7 +45,7 @@
 
 Examples:
 
-.. code-block:: nasm
+.. parsed-literal::
 
     s_waitcnt 0
     s_waitcnt vmcnt(1)