| commit | 4b7239ebaca72f2cd92682019fbe0bef5b46cd4e | [log] [tgz] |
|---|---|---|
| author | Oliver Stannard <oliver.stannard@linaro.org> | Fri Aug 02 10:23:17 2019 +0000 |
| committer | Oliver Stannard <oliver.stannard@linaro.org> | Fri Aug 02 10:23:17 2019 +0000 |
| tree | 9e69d9d57dd2290f21ab73a63cf156a676e4cf36 | |
| parent | f6b00c279a5587a25876752a6ecd8da0bed959dc [diff] |
[IPRA][ARM] Disable no-CSR optimisation for ARM This optimisation isn't generally profitable for ARM, because we can save/restore many registers in the prologue and epilogue using the PUSH and POP instructions, but mostly use individual LDR/STR instructions for other spills. Differential revision: https://reviews.llvm.org/D64910 llvm-svn: 367670