commit 22a690e3db7fcd4e70eddb6d0730398dadabdbd8
author Bill Wendling <isanbard@gmail.com> Thu Oct 13 07:42:32 2011 +0000
committer Bill Wendling <isanbard@gmail.com> Thu Oct 13 07:42:32 2011 +0000
tree 7f11e3924c6387840146d40f61f4f8288e0726a7
parent 86f7d3556c8dc65ff33dfb1b3016e4db30e1d362

Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I.

llvm-svn: 141856

llvm/lib/Target/X86/X86FrameLowering.cpp

diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 23b0716..757cef2 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -1414,11 +1414,12 @@
   if (!Is64Bit)
     BuildMI(allocMBB, DL, TII.get(X86::ADD32ri), X86::ESP).addReg(X86::ESP)
       .addImm(8);
-  BuildMI(allocMBB, DL, TII.get(X86::RET));
 
   if (Is64Bit && IsNested)
     BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::R10).addReg(X86::RAX);
 
+  BuildMI(allocMBB, DL, TII.get(X86::RET));
+
   allocMBB->addSuccessor(&prologueMBB);
   checkMBB->addSuccessor(allocMBB);
   checkMBB->addSuccessor(&prologueMBB);