commit 240d20af79cdfe9abd51425c18bbbb06ec072c62
author Owen Anderson <resistor@mac.com> Fri Aug 26 21:47:57 2011 +0000
committer Owen Anderson <resistor@mac.com> Fri Aug 26 21:47:57 2011 +0000
tree 973e86b9ab0e33a6a710c88985b2de68a21fa458
parent f0be551d68267d52b9ca7e852754da6a683eb7c1

Spelling fail.

llvm-svn: 138667

llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 3cdcb05..6b87dfd 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -2324,7 +2324,7 @@
     default:
       return Fail;
     case ARM::tADR:
-      break; // tADR does not explicitly represent the PC as an oeprand.
+      break; // tADR does not explicitly represent the PC as an operand.
     case ARM::tADDrSPi:
       Inst.addOperand(MCOperand::CreateReg(ARM::SP));
       break;