commit 2491f826794727d6677ec7b2edea7dd9b418c7b0
author Matt Arsenault <Matthew.Arsenault@amd.com> Sat Feb 02 23:31:50 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Sat Feb 02 23:31:50 2019 +0000
tree 70fa452583adf855b9f9228708cee0822faf6be7
parent cbaada6bc18188853b311d42c0356b8a6ca24c7a

AMDGPU/GlobalISel: Legalize select for pointer types

llvm-svn: 352974

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index be9a430..1565659 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -359,7 +359,9 @@
 
   // TODO: Pointer types, any 32-bit or 64-bit vector
   getActionDefinitionsBuilder(G_SELECT)
-    .legalFor({{S32, S1}, {S64, S1}, {V2S32, S1}, {V2S16, S1}})
+    .legalForCartesianProduct({S32, S64, V2S32, V2S16, GlobalPtr, LocalPtr,
+          FlatPtr, PrivatePtr, LLT::vector(2, LocalPtr),
+          LLT::vector(2, PrivatePtr)}, {S1})
     .clampScalar(0, S32, S64)
     .fewerElementsIf(
       [=](const LegalityQuery &Query) {
@@ -380,7 +382,10 @@
                Query.Types[0].getElementType().getSizeInBits() < 32;},
       scalarize(0))
     .scalarize(1)
-    .clampMaxNumElements(0, S32, 2);
+    .clampMaxNumElements(0, S32, 2)
+    .clampMaxNumElements(0, LocalPtr, 2)
+    .clampMaxNumElements(0, PrivatePtr, 2)
+    .legalIf(all(isPointer(0), typeIs(1, S1)));
 
   // TODO: Only the low 4/5/6 bits of the shift amount are observed, so we can
   // be more flexible with the shift amount type.
@@ -435,7 +440,8 @@
       .minScalarSameAs(1, 0)
       // FIXME: Sort of a hack to make progress on other legalizations.
       .legalIf([=](const LegalityQuery &Query) {
-        return Query.Types[0].getScalarSizeInBits() < 32;
+        return Query.Types[0].getScalarSizeInBits() <= 32 ||
+               Query.Types[0].getScalarSizeInBits() == 64;
       });
 
   // TODO: Support any combination of v2s32
@@ -446,7 +452,9 @@
                {V4S64, V2S64},
                {V4S16, V2S16},
                {V8S16, V2S16},
-               {V8S16, V4S16}});
+               {V8S16, V4S16},
+               {LLT::vector(4, LocalPtr), LLT::vector(2, LocalPtr)},
+               {LLT::vector(4, PrivatePtr), LLT::vector(2, PrivatePtr)}});
 
   // Merge/Unmerge
   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {