[CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.
The MIR printer prints the IR name of a MBB only for block definitions.
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix
Differential Revision: https://reviews.llvm.org/D40422
llvm-svn: 319665
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 2d82f81..1bc8b4e 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2710,7 +2710,8 @@
(isBlockOnlyReachableByFallthrough(&MBB) && !MBB.isEHFuncletEntry())) {
if (isVerbose()) {
// NOTE: Want this comment at start of line, don't emit with AddComment.
- OutStreamer->emitRawComment(" BB#" + Twine(MBB.getNumber()) + ":", false);
+ OutStreamer->emitRawComment(" %bb." + Twine(MBB.getNumber()) + ":",
+ false);
}
} else {
OutStreamer->EmitLabel(MBB.getSymbol());
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index d31260e..92e73cb 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -613,8 +613,8 @@
CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2);
if (CommonTailLen == 0)
return false;
- DEBUG(dbgs() << "Common tail length of BB#" << MBB1->getNumber()
- << " and BB#" << MBB2->getNumber() << " is " << CommonTailLen
+ DEBUG(dbgs() << "Common tail length of " << printMBBReference(*MBB1)
+ << " and " << printMBBReference(*MBB2) << " is " << CommonTailLen
<< '\n');
// It's almost always profitable to merge any number of non-terminator
@@ -770,7 +770,7 @@
SameTails[commonTailIndex].getTailStartPos();
MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
- DEBUG(dbgs() << "\nSplitting BB#" << MBB->getNumber() << ", size "
+ DEBUG(dbgs() << "\nSplitting " << printMBBReference(*MBB) << ", size "
<< maxCommonTailLength);
// If the split block unconditionally falls-thru to SuccBB, it will be
@@ -920,20 +920,17 @@
bool MadeChange = false;
DEBUG(dbgs() << "\nTryTailMergeBlocks: ";
- for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
- dbgs() << "BB#" << MergePotentials[i].getBlock()->getNumber()
- << (i == e-1 ? "" : ", ");
- dbgs() << "\n";
- if (SuccBB) {
- dbgs() << " with successor BB#" << SuccBB->getNumber() << '\n';
+ for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i) dbgs()
+ << printMBBReference(*MergePotentials[i].getBlock())
+ << (i == e - 1 ? "" : ", ");
+ dbgs() << "\n"; if (SuccBB) {
+ dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
if (PredBB)
- dbgs() << " which has fall-through from BB#"
- << PredBB->getNumber() << "\n";
- }
- dbgs() << "Looking for common tails of at least "
- << MinCommonTailLength << " instruction"
- << (MinCommonTailLength == 1 ? "" : "s") << '\n';
- );
+ dbgs() << " which has fall-through from "
+ << printMBBReference(*PredBB) << "\n";
+ } dbgs() << "Looking for common tails of at least "
+ << MinCommonTailLength << " instruction"
+ << (MinCommonTailLength == 1 ? "" : "s") << '\n';);
// Sort by hash value so that blocks with identical end sequences sort
// together.
@@ -1013,13 +1010,13 @@
// MBB is common tail. Adjust all other BB's to jump to this one.
// Traversal must be forwards so erases work.
- DEBUG(dbgs() << "\nUsing common tail in BB#" << MBB->getNumber()
+ DEBUG(dbgs() << "\nUsing common tail in " << printMBBReference(*MBB)
<< " for ");
for (unsigned int i=0, e = SameTails.size(); i != e; ++i) {
if (commonTailIndex == i)
continue;
- DEBUG(dbgs() << "BB#" << SameTails[i].getBlock()->getNumber()
- << (i == e-1 ? "" : ", "));
+ DEBUG(dbgs() << printMBBReference(*SameTails[i].getBlock())
+ << (i == e - 1 ? "" : ", "));
// Hack the end off BB i, making it jump to BB commonTailIndex instead.
replaceTailWithBranchTo(SameTails[i].getTailStartPos(), *MBB);
// BB i is no longer a predecessor of SuccBB; remove it from the worklist.
diff --git a/llvm/lib/CodeGen/BranchRelaxation.cpp b/llvm/lib/CodeGen/BranchRelaxation.cpp
index 99fa4dc..0d87f14 100644
--- a/llvm/lib/CodeGen/BranchRelaxation.cpp
+++ b/llvm/lib/CodeGen/BranchRelaxation.cpp
@@ -143,7 +143,7 @@
LLVM_DUMP_METHOD void BranchRelaxation::dumpBBs() {
for (auto &MBB : *MF) {
const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()];
- dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
+ dbgs() << format("%bb.%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
<< format("size=%#x\n", BBI.Size);
}
}
@@ -287,13 +287,10 @@
if (TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - BrOffset))
return true;
- DEBUG(
- dbgs() << "Out of range branch to destination BB#" << DestBB.getNumber()
- << " from BB#" << MI.getParent()->getNumber()
- << " to " << DestOffset
- << " offset " << DestOffset - BrOffset
- << '\t' << MI
- );
+ DEBUG(dbgs() << "Out of range branch to destination "
+ << printMBBReference(DestBB) << " from "
+ << printMBBReference(*MI.getParent()) << " to " << DestOffset
+ << " offset " << DestOffset - BrOffset << '\t' << MI);
return false;
}
@@ -366,9 +363,9 @@
// just created), so we can invert the condition.
MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB));
- DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber()
- << ", invert condition and change dest. to BB#"
- << NextBB.getNumber() << '\n');
+ DEBUG(dbgs() << " Insert B to " << printMBBReference(*TBB)
+ << ", invert condition and change dest. to "
+ << printMBBReference(NextBB) << '\n');
unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size;
diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp
index bb181b7..461da8f 100644
--- a/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -185,7 +185,7 @@
// Reject any live-in physregs. It's probably CPSR/EFLAGS, and very hard to
// get right.
if (!MBB->livein_empty()) {
- DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has live-ins.\n");
+ DEBUG(dbgs() << printMBBReference(*MBB) << " has live-ins.\n");
return false;
}
@@ -199,7 +199,7 @@
continue;
if (++InstrCount > BlockInstrLimit && !Stress) {
- DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has more than "
+ DEBUG(dbgs() << printMBBReference(*MBB) << " has more than "
<< BlockInstrLimit << " instructions.\n");
return false;
}
@@ -246,7 +246,7 @@
if (!DefMI || DefMI->getParent() != Head)
continue;
if (InsertAfter.insert(DefMI).second)
- DEBUG(dbgs() << "BB#" << MBB->getNumber() << " depends on " << *DefMI);
+ DEBUG(dbgs() << printMBBReference(*MBB) << " depends on " << *DefMI);
if (DefMI->isTerminator()) {
DEBUG(dbgs() << "Can't insert instructions below terminator.\n");
return false;
@@ -361,10 +361,10 @@
if (Succ1->pred_size() != 1 || Succ1->succ_size() != 1 ||
Succ1->succ_begin()[0] != Tail)
return false;
- DEBUG(dbgs() << "\nDiamond: BB#" << Head->getNumber()
- << " -> BB#" << Succ0->getNumber()
- << "/BB#" << Succ1->getNumber()
- << " -> BB#" << Tail->getNumber() << '\n');
+ DEBUG(dbgs() << "\nDiamond: " << printMBBReference(*Head) << " -> "
+ << printMBBReference(*Succ0) << "/"
+ << printMBBReference(*Succ1) << " -> "
+ << printMBBReference(*Tail) << '\n');
// Live-in physregs are tricky to get right when speculating code.
if (!Tail->livein_empty()) {
@@ -372,9 +372,9 @@
return false;
}
} else {
- DEBUG(dbgs() << "\nTriangle: BB#" << Head->getNumber()
- << " -> BB#" << Succ0->getNumber()
- << " -> BB#" << Tail->getNumber() << '\n');
+ DEBUG(dbgs() << "\nTriangle: " << printMBBReference(*Head) << " -> "
+ << printMBBReference(*Succ0) << " -> "
+ << printMBBReference(*Tail) << '\n');
}
// This is a triangle or a diamond.
@@ -563,8 +563,8 @@
assert(Head->succ_empty() && "Additional head successors?");
if (!ExtraPreds && Head->isLayoutSuccessor(Tail)) {
// Splice Tail onto the end of Head.
- DEBUG(dbgs() << "Joining tail BB#" << Tail->getNumber()
- << " into head BB#" << Head->getNumber() << '\n');
+ DEBUG(dbgs() << "Joining tail " << printMBBReference(*Tail) << " into head "
+ << printMBBReference(*Head) << '\n');
Head->splice(Head->end(), Tail,
Tail->begin(), Tail->end());
Head->transferSuccessorsAndUpdatePHIs(Tail);
diff --git a/llvm/lib/CodeGen/EdgeBundles.cpp b/llvm/lib/CodeGen/EdgeBundles.cpp
index b3a25544..54c53eb 100644
--- a/llvm/lib/CodeGen/EdgeBundles.cpp
+++ b/llvm/lib/CodeGen/EdgeBundles.cpp
@@ -80,13 +80,15 @@
O << "digraph {\n";
for (const auto &MBB : *MF) {
unsigned BB = MBB.getNumber();
- O << "\t\"BB#" << BB << "\" [ shape=box ]\n"
- << '\t' << G.getBundle(BB, false) << " -> \"BB#" << BB << "\"\n"
- << "\t\"BB#" << BB << "\" -> " << G.getBundle(BB, true) << '\n';
+ O << "\t\"" << printMBBReference(MBB) << "\" [ shape=box ]\n"
+ << '\t' << G.getBundle(BB, false) << " -> \"" << printMBBReference(MBB)
+ << "\"\n"
+ << "\t\"" << printMBBReference(MBB) << "\" -> " << G.getBundle(BB, true)
+ << '\n';
for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
SE = MBB.succ_end(); SI != SE; ++SI)
- O << "\t\"BB#" << BB << "\" -> \"BB#" << (*SI)->getNumber()
- << "\" [ color=lightgray ]\n";
+ O << "\t\"" << printMBBReference(MBB) << "\" -> \""
+ << printMBBReference(**SI) << "\" [ color=lightgray ]\n";
}
O << "}\n";
return O;
diff --git a/llvm/lib/CodeGen/ExecutionDepsFix.cpp b/llvm/lib/CodeGen/ExecutionDepsFix.cpp
index 73c4b6a..df51ecc 100644
--- a/llvm/lib/CodeGen/ExecutionDepsFix.cpp
+++ b/llvm/lib/CodeGen/ExecutionDepsFix.cpp
@@ -200,7 +200,7 @@
LiveRegs[rx].Def = -1;
}
}
- DEBUG(dbgs() << "BB#" << MBB->getNumber() << ": entry\n");
+ DEBUG(dbgs() << printMBBReference(*MBB) << ": entry\n");
return;
}
@@ -246,7 +246,7 @@
}
}
DEBUG(
- dbgs() << "BB#" << MBB->getNumber()
+ dbgs() << printMBBReference(*MBB)
<< (!isBlockDone(MBB) ? ": incomplete\n" : ": all preds known\n"));
}
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 567461c..1bac568 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -406,12 +406,12 @@
case ICSimpleFalse: {
bool isFalse = Kind == ICSimpleFalse;
if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
- DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
- " false" : "")
- << "): BB#" << BBI.BB->getNumber() << " ("
- << ((Kind == ICSimpleFalse)
- ? BBI.FalseBB->getNumber()
- : BBI.TrueBB->getNumber()) << ") ");
+ DEBUG(dbgs() << "Ifcvt (Simple"
+ << (Kind == ICSimpleFalse ? " false" : "")
+ << "): " << printMBBReference(*BBI.BB) << " ("
+ << ((Kind == ICSimpleFalse) ? BBI.FalseBB->getNumber()
+ : BBI.TrueBB->getNumber())
+ << ") ");
RetVal = IfConvertSimple(BBI, Kind);
DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
if (RetVal) {
@@ -435,9 +435,9 @@
DEBUG(dbgs() << " false");
if (isRev)
DEBUG(dbgs() << " rev");
- DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
- << BBI.TrueBB->getNumber() << ",F:"
- << BBI.FalseBB->getNumber() << ") ");
+ DEBUG(dbgs() << "): " << printMBBReference(*BBI.BB)
+ << " (T:" << BBI.TrueBB->getNumber()
+ << ",F:" << BBI.FalseBB->getNumber() << ") ");
RetVal = IfConvertTriangle(BBI, Kind);
DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
if (RetVal) {
@@ -453,9 +453,9 @@
}
case ICDiamond:
if (DisableDiamond) break;
- DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
- << BBI.TrueBB->getNumber() << ",F:"
- << BBI.FalseBB->getNumber() << ") ");
+ DEBUG(dbgs() << "Ifcvt (Diamond): " << printMBBReference(*BBI.BB)
+ << " (T:" << BBI.TrueBB->getNumber()
+ << ",F:" << BBI.FalseBB->getNumber() << ") ");
RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2,
Token->TClobbersPred,
Token->FClobbersPred);
@@ -464,10 +464,9 @@
break;
case ICForkedDiamond:
if (DisableForkedDiamond) break;
- DEBUG(dbgs() << "Ifcvt (Forked Diamond): BB#"
- << BBI.BB->getNumber() << " (T:"
- << BBI.TrueBB->getNumber() << ",F:"
- << BBI.FalseBB->getNumber() << ") ");
+ DEBUG(dbgs() << "Ifcvt (Forked Diamond): " << printMBBReference(*BBI.BB)
+ << " (T:" << BBI.TrueBB->getNumber()
+ << ",F:" << BBI.FalseBB->getNumber() << ") ");
RetVal = IfConvertForkedDiamond(BBI, Kind, NumDups, NumDups2,
Token->TClobbersPred,
Token->FClobbersPred);
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 97bb7c7..5f0559b 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -1174,7 +1174,7 @@
MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
- DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
+ DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, LIS, TII, TRI);
// This interval may span multiple basic blocks.
// Insert a DBG_VALUE into each one.
@@ -1184,7 +1184,7 @@
if (++MBB == MFEnd)
break;
MBBEnd = LIS.getMBBEndIdx(&*MBB);
- DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
+ DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, LIS, TII, TRI);
}
DEBUG(dbgs() << '\n');
diff --git a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
index fb7fbe7..0680754 100644
--- a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -323,7 +323,7 @@
// Create phi-defs at Begin for all live-in registers.
SlotIndex Begin = Indexes->getMBBStartIdx(&MBB);
- DEBUG(dbgs() << Begin << "\tBB#" << MBB.getNumber());
+ DEBUG(dbgs() << Begin << "\t" << printMBBReference(MBB));
for (const auto &LI : MBB.liveins()) {
for (MCRegUnitIterator Units(LI.PhysReg, TRI); Units.isValid(); ++Units) {
unsigned Unit = *Units;
diff --git a/llvm/lib/CodeGen/LiveRangeCalc.cpp b/llvm/lib/CodeGen/LiveRangeCalc.cpp
index 0074a9f..352d75e 100644
--- a/llvm/lib/CodeGen/LiveRangeCalc.cpp
+++ b/llvm/lib/CodeGen/LiveRangeCalc.cpp
@@ -377,7 +377,7 @@
MBB->getParent()->verify();
const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
errs() << "The register " << printReg(PhysReg, TRI)
- << " needs to be live in to BB#" << MBB->getNumber()
+ << " needs to be live in to " << printMBBReference(*MBB)
<< ", but is missing from the live-in list.\n";
report_fatal_error("Invalid global physical register");
}
diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.cpp b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
index d23df9c..ac69692 100644
--- a/llvm/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
@@ -277,6 +277,9 @@
C.advance();
StringRef Number = NumberRange.upto(C);
unsigned StringOffset = PrefixLength + Number.size(); // Drop '%bb.<id>'
+ // TODO: The format bb.<id>.<irname> is supported only when it's not a
+ // reference. Once we deprecate the format where the irname shows up, we
+ // should only lex forward if it is a reference.
if (C.peek() == '.') {
C.advance(); // Skip '.'
++StringOffset;
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 9b5539a..de951e4 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1344,6 +1344,8 @@
return error(Twine("use of undefined machine basic block #") +
Twine(Number));
MBB = MBBInfo->second;
+ // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
+ // we drop the <irname> from the bb.<id>.<irname> format.
if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
return error(Twine("the name of machine basic block #") + Twine(Number) +
" isn't '" + Token.stringValue() + "'");
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 92dc0ae..aa0f380 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -157,7 +157,6 @@
void print(const MachineBasicBlock &MBB);
void print(const MachineInstr &MI);
- void printMBBReference(const MachineBasicBlock &MBB);
void printIRBlockReference(const BasicBlock &BB);
void printIRValueReference(const Value &V);
void printStackObjectReference(int FrameIndex);
@@ -338,13 +337,11 @@
YamlMFI.HasMustTailInVarArgFunc = MFI.hasMustTailInVarArgFunc();
if (MFI.getSavePoint()) {
raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
- MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
- .printMBBReference(*MFI.getSavePoint());
+ StrOS << printMBBReference(*MFI.getSavePoint());
}
if (MFI.getRestorePoint()) {
raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
- MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
- .printMBBReference(*MFI.getRestorePoint());
+ StrOS << printMBBReference(*MFI.getRestorePoint());
}
}
@@ -493,8 +490,7 @@
Entry.ID = ID++;
for (const auto *MBB : Table.MBBs) {
raw_string_ostream StrOS(Str);
- MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
- .printMBBReference(*MBB);
+ StrOS << printMBBReference(*MBB);
Entry.Blocks.push_back(StrOS.str());
Str.clear();
}
@@ -616,7 +612,7 @@
for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
if (I != MBB.succ_begin())
OS << ", ";
- printMBBReference(**I);
+ OS << printMBBReference(**I);
if (!SimplifyMIR || !canPredictProbs)
OS << '('
<< format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
@@ -764,14 +760,6 @@
}
}
-void MIPrinter::printMBBReference(const MachineBasicBlock &MBB) {
- OS << "%bb." << MBB.getNumber();
- if (const auto *BB = MBB.getBasicBlock()) {
- if (BB->hasName())
- OS << '.' << BB->getName();
- }
-}
-
static void printIRSlotNumber(raw_ostream &OS, int Slot) {
if (Slot == -1)
OS << "<badref>";
@@ -967,7 +955,7 @@
Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
break;
case MachineOperand::MO_MachineBasicBlock:
- printMBBReference(*Op.getMBB());
+ OS << printMBBReference(*Op.getMBB());
break;
case MachineOperand::MO_FrameIndex:
printStackObjectReference(Op.getIndex());
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 8863ac2..5522d66 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -70,6 +70,10 @@
return OS;
}
+Printable llvm::printMBBReference(const MachineBasicBlock &MBB) {
+ return Printable([&MBB](raw_ostream &OS) { return MBB.printAsOperand(OS); });
+}
+
/// When an MBB is added to an MF, we need to update the parent pointer of the
/// MBB, the MBB numbering, and any instructions in the MBB to be on the right
/// operand list for registers.
@@ -281,7 +285,7 @@
if (Indexes)
OS << Indexes->getMBBStartIdx(this) << '\t';
- OS << "BB#" << getNumber() << ": ";
+ OS << printMBBReference(*this) << ": ";
const char *Comma = "";
if (const BasicBlock *LBB = getBasicBlock()) {
@@ -313,7 +317,7 @@
if (Indexes) OS << '\t';
OS << " Predecessors according to CFG:";
for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
- OS << " BB#" << (*PI)->getNumber();
+ OS << " " << printMBBReference(*(*PI));
OS << '\n';
}
@@ -334,7 +338,7 @@
if (Indexes) OS << '\t';
OS << " Successors according to CFG:";
for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) {
- OS << " BB#" << (*SI)->getNumber();
+ OS << " " << printMBBReference(*(*SI));
if (!Probs.empty())
OS << '(' << *getProbabilityIterator(SI) << ')';
}
@@ -350,7 +354,7 @@
void MachineBasicBlock::printAsOperand(raw_ostream &OS,
bool /*PrintType*/) const {
- OS << "BB#" << getNumber();
+ OS << "%bb." << getNumber();
}
void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) {
@@ -767,10 +771,9 @@
MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
MF->insert(std::next(MachineFunction::iterator(this)), NMBB);
- DEBUG(dbgs() << "Splitting critical edge:"
- " BB#" << getNumber()
- << " -- BB#" << NMBB->getNumber()
- << " -- BB#" << Succ->getNumber() << '\n');
+ DEBUG(dbgs() << "Splitting critical edge: " << printMBBReference(*this)
+ << " -- " << printMBBReference(*NMBB) << " -- "
+ << printMBBReference(*Succ) << '\n');
LiveIntervals *LIS = P.getAnalysisIfAvailable<LiveIntervals>();
SlotIndexes *Indexes = P.getAnalysisIfAvailable<SlotIndexes>();
@@ -1023,8 +1026,8 @@
// case that we can't handle. Since this never happens in properly optimized
// code, just skip those edges.
if (TBB && TBB == FBB) {
- DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
- << getNumber() << '\n');
+ DEBUG(dbgs() << "Won't split critical edge after degenerate "
+ << printMBBReference(*this) << '\n');
return false;
}
return true;
diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
index f0285ea..87af953 100644
--- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp
+++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
@@ -546,7 +546,7 @@
static std::string getBlockName(const MachineBasicBlock *BB) {
std::string Result;
raw_string_ostream OS(Result);
- OS << "BB#" << BB->getNumber();
+ OS << printMBBReference(*BB);
OS << " ('" << BB->getName() << "')";
OS.flush();
return Result;
diff --git a/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp b/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
index 21eff9d..e4952aa 100644
--- a/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
@@ -84,7 +84,7 @@
const MachineBasicBlock *Dst) const {
const BranchProbability Prob = getEdgeProbability(Src, Dst);
- OS << "edge MBB#" << Src->getNumber() << " -> MBB#" << Dst->getNumber()
+ OS << "edge " << printMBBReference(*Src) << " -> " << printMBBReference(*Dst)
<< " probability is " << Prob
<< (isEdgeHot(Src, Dst) ? " [HOT edge]\n" : "\n");
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 1f55b8f..f0d5eec 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -546,7 +546,7 @@
raw_string_ostream OSS(OutStr);
if (isSimple()) {
- OSS << "BB#" << Node->getNumber();
+ OSS << printMBBReference(*Node);
if (const BasicBlock *BB = Node->getBasicBlock())
OSS << ": " << BB->getName();
} else
@@ -908,7 +908,7 @@
for (unsigned i = 0, e = JumpTables.size(); i != e; ++i) {
OS << " jt#" << i << ": ";
for (unsigned j = 0, f = JumpTables[i].MBBs.size(); j != f; ++j)
- OS << " BB#" << JumpTables[i].MBBs[j]->getNumber();
+ OS << ' ' << printMBBReference(*JumpTables[i].MBBs[j]);
}
OS << '\n';
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index 3e622b4..a251a08 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -563,8 +563,8 @@
// Now move the instructions to the predecessor, inserting it before any
// terminator instructions.
- DEBUG(dbgs() << "Hoisting to BB#" << Preheader->getNumber() << " from BB#"
- << MI->getParent()->getNumber() << ": " << *MI);
+ DEBUG(dbgs() << "Hoisting to " << printMBBReference(*Preheader) << " from "
+ << printMBBReference(*MI->getParent()) << ": " << *MI);
// Splice the instruction to the preheader.
MachineBasicBlock *MBB = MI->getParent();
@@ -601,14 +601,14 @@
}
void MachineLICM::EnterScope(MachineBasicBlock *MBB) {
- DEBUG(dbgs() << "Entering BB#" << MBB->getNumber() << '\n');
+ DEBUG(dbgs() << "Entering " << printMBBReference(*MBB) << '\n');
// Remember livein register pressure.
BackTrace.push_back(RegPressure);
}
void MachineLICM::ExitScope(MachineBasicBlock *MBB) {
- DEBUG(dbgs() << "Exiting BB#" << MBB->getNumber() << '\n');
+ DEBUG(dbgs() << "Exiting " << printMBBReference(*MBB) << '\n');
BackTrace.pop_back();
}
@@ -1336,9 +1336,9 @@
DEBUG({
dbgs() << "Hoisting " << *MI;
if (MI->getParent()->getBasicBlock())
- dbgs() << " from BB#" << MI->getParent()->getNumber();
+ dbgs() << " from " << printMBBReference(*MI->getParent());
if (Preheader->getBasicBlock())
- dbgs() << " to BB#" << Preheader->getNumber();
+ dbgs() << " to " << printMBBReference(*Preheader);
dbgs() << "\n";
});
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 2dbf57f..acd83dd 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -428,7 +428,7 @@
}
break;
case MachineOperand::MO_MachineBasicBlock:
- OS << "<BB#" << getMBB()->getNumber() << ">";
+ OS << printMBBReference(*getMBB());
break;
case MachineOperand::MO_FrameIndex:
OS << "<fi#" << getIndex() << '>';
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 6aaacb4..3e796cc 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -98,7 +98,7 @@
static cl::opt<std::string> SchedOnlyFunc("misched-only-func", cl::Hidden,
cl::desc("Only schedule this function"));
static cl::opt<unsigned> SchedOnlyBlock("misched-only-block", cl::Hidden,
- cl::desc("Only schedule this MBB#"));
+ cl::desc("Only schedule this MBB#"));
#else
static bool ViewMISchedDAGs = false;
#endif // NDEBUG
@@ -548,15 +548,14 @@
continue;
}
DEBUG(dbgs() << "********** MI Scheduling **********\n");
- DEBUG(dbgs() << MF->getName()
- << ":BB#" << MBB->getNumber() << " " << MBB->getName()
- << "\n From: " << *I << " To: ";
+ DEBUG(dbgs() << MF->getName() << ":" << printMBBReference(*MBB) << " "
+ << MBB->getName() << "\n From: " << *I << " To: ";
if (RegionEnd != MBB->end()) dbgs() << *RegionEnd;
else dbgs() << "End";
dbgs() << " RegionInstrs: " << NumRegionInstrs << '\n');
if (DumpCriticalPathLength) {
errs() << MF->getName();
- errs() << ":BB# " << MBB->getNumber();
+ errs() << ":%bb. " << MBB->getNumber();
errs() << " " << MBB->getName() << " \n";
}
@@ -823,11 +822,11 @@
placeDebugValues();
DEBUG({
- unsigned BBNum = begin()->getParent()->getNumber();
- dbgs() << "*** Final schedule for BB#" << BBNum << " ***\n";
- dumpSchedule();
- dbgs() << '\n';
- });
+ dbgs() << "*** Final schedule for "
+ << printMBBReference(*begin()->getParent()) << " ***\n";
+ dumpSchedule();
+ dbgs() << '\n';
+ });
}
/// Apply each ScheduleDAGMutation step in order.
@@ -1261,11 +1260,11 @@
placeDebugValues();
DEBUG({
- unsigned BBNum = begin()->getParent()->getNumber();
- dbgs() << "*** Final schedule for BB#" << BBNum << " ***\n";
- dumpSchedule();
- dbgs() << '\n';
- });
+ dbgs() << "*** Final schedule for "
+ << printMBBReference(*begin()->getParent()) << " ***\n";
+ dumpSchedule();
+ dbgs() << '\n';
+ });
}
/// Build the DAG and setup three register pressure trackers.
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 11257d9..7857084 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -243,17 +243,17 @@
// into and they are all PHI nodes. In this case, machine-sink must break
// the critical edge first. e.g.
//
- // BB#1: derived from LLVM BB %bb4.preheader
- // Predecessors according to CFG: BB#0
+ // %bb.1: derived from LLVM BB %bb4.preheader
+ // Predecessors according to CFG: %bb.0
// ...
// %reg16385<def> = DEC64_32r %reg16437, %eflags<imp-def,dead>
// ...
- // JE_4 <BB#37>, %eflags<imp-use>
- // Successors according to CFG: BB#37 BB#2
+ // JE_4 <%bb.37>, %eflags<imp-use>
+ // Successors according to CFG: %bb.37 %bb.2
//
- // BB#2: derived from LLVM BB %bb.nph
- // Predecessors according to CFG: BB#0 BB#1
- // %reg16386<def> = PHI %reg16434, <BB#0>, %reg16385, <BB#1>
+ // %bb.2: derived from LLVM BB %bb.nph
+ // Predecessors according to CFG: %bb.0 %bb.1
+ // %reg16386<def> = PHI %reg16434, %bb.0, %reg16385, %bb.1
BreakPHIEdge = true;
for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
MachineInstr *UseInst = MO.getParent();
@@ -321,10 +321,10 @@
for (auto &Pair : ToSplit) {
auto NewSucc = Pair.first->SplitCriticalEdge(Pair.second, *this);
if (NewSucc != nullptr) {
- DEBUG(dbgs() << " *** Splitting critical edge:"
- " BB#" << Pair.first->getNumber()
- << " -- BB#" << NewSucc->getNumber()
- << " -- BB#" << Pair.second->getNumber() << '\n');
+ DEBUG(dbgs() << " *** Splitting critical edge: "
+ << printMBBReference(*Pair.first) << " -- "
+ << printMBBReference(*NewSucc) << " -- "
+ << printMBBReference(*Pair.second) << '\n');
MadeChange = true;
++NumSplit;
} else
@@ -460,33 +460,33 @@
// It's not always legal to break critical edges and sink the computation
// to the edge.
//
- // BB#1:
+ // %bb.1:
// v1024
- // Beq BB#3
+ // Beq %bb.3
// <fallthrough>
- // BB#2:
+ // %bb.2:
// ... no uses of v1024
// <fallthrough>
- // BB#3:
+ // %bb.3:
// ...
// = v1024
//
- // If BB#1 -> BB#3 edge is broken and computation of v1024 is inserted:
+ // If %bb.1 -> %bb.3 edge is broken and computation of v1024 is inserted:
//
- // BB#1:
+ // %bb.1:
// ...
- // Bne BB#2
- // BB#4:
+ // Bne %bb.2
+ // %bb.4:
// v1024 =
- // B BB#3
- // BB#2:
+ // B %bb.3
+ // %bb.2:
// ... no uses of v1024
// <fallthrough>
- // BB#3:
+ // %bb.3:
// ...
// = v1024
//
- // This is incorrect since v1024 is not computed along the BB#1->BB#2->BB#3
+ // This is incorrect since v1024 is not computed along the %bb.1->%bb.2->%bb.3
// flow. We need to ensure the new basic block where the computation is
// sunk to dominates all the uses.
// It's only legal to break critical edge and sink the computation to the
diff --git a/llvm/lib/CodeGen/MachineTraceMetrics.cpp b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
index 453b47b..d81c6f8 100644
--- a/llvm/lib/CodeGen/MachineTraceMetrics.cpp
+++ b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
@@ -396,7 +396,8 @@
}
void MachineTraceMetrics::invalidate(const MachineBasicBlock *MBB) {
- DEBUG(dbgs() << "Invalidate traces through BB#" << MBB->getNumber() << '\n');
+ DEBUG(dbgs() << "Invalidate traces through " << printMBBReference(*MBB)
+ << '\n');
BlockInfo[MBB->getNumber()].invalidate();
for (unsigned i = 0; i != TS_NumStrategies; ++i)
if (Ensembles[i])
@@ -476,8 +477,8 @@
/// Compute the trace through MBB.
void MachineTraceMetrics::Ensemble::computeTrace(const MachineBasicBlock *MBB) {
- DEBUG(dbgs() << "Computing " << getName() << " trace through BB#"
- << MBB->getNumber() << '\n');
+ DEBUG(dbgs() << "Computing " << getName() << " trace through "
+ << printMBBReference(*MBB) << '\n');
// Set up loop bounds for the backwards post-order traversal.
LoopBounds Bounds(BlockInfo, MTM.Loops);
@@ -485,13 +486,13 @@
Bounds.Downward = false;
Bounds.Visited.clear();
for (auto I : inverse_post_order_ext(MBB, Bounds)) {
- DEBUG(dbgs() << " pred for BB#" << I->getNumber() << ": ");
+ DEBUG(dbgs() << " pred for " << printMBBReference(*I) << ": ");
TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
// All the predecessors have been visited, pick the preferred one.
TBI.Pred = pickTracePred(I);
DEBUG({
if (TBI.Pred)
- dbgs() << "BB#" << TBI.Pred->getNumber() << '\n';
+ dbgs() << printMBBReference(*TBI.Pred) << '\n';
else
dbgs() << "null\n";
});
@@ -503,13 +504,13 @@
Bounds.Downward = true;
Bounds.Visited.clear();
for (auto I : post_order_ext(MBB, Bounds)) {
- DEBUG(dbgs() << " succ for BB#" << I->getNumber() << ": ");
+ DEBUG(dbgs() << " succ for " << printMBBReference(*I) << ": ");
TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
// All the successors have been visited, pick the preferred one.
TBI.Succ = pickTraceSucc(I);
DEBUG({
if (TBI.Succ)
- dbgs() << "BB#" << TBI.Succ->getNumber() << '\n';
+ dbgs() << printMBBReference(*TBI.Succ) << '\n';
else
dbgs() << "null\n";
});
@@ -530,8 +531,8 @@
WorkList.push_back(BadMBB);
do {
const MachineBasicBlock *MBB = WorkList.pop_back_val();
- DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName()
- << " height.\n");
+ DEBUG(dbgs() << "Invalidate " << printMBBReference(*MBB) << ' '
+ << getName() << " height.\n");
// Find any MBB predecessors that have MBB as their preferred successor.
// They are the only ones that need to be invalidated.
for (const MachineBasicBlock *Pred : MBB->predecessors()) {
@@ -555,8 +556,8 @@
WorkList.push_back(BadMBB);
do {
const MachineBasicBlock *MBB = WorkList.pop_back_val();
- DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName()
- << " depth.\n");
+ DEBUG(dbgs() << "Invalidate " << printMBBReference(*MBB) << ' '
+ << getName() << " depth.\n");
// Find any MBB successors that have MBB as their preferred predecessor.
// They are the only ones that need to be invalidated.
for (const MachineBasicBlock *Succ : MBB->successors()) {
@@ -859,7 +860,7 @@
// Go through trace blocks in top-down order, stopping after the center block.
while (!Stack.empty()) {
MBB = Stack.pop_back_val();
- DEBUG(dbgs() << "\nDepths for BB#" << MBB->getNumber() << ":\n");
+ DEBUG(dbgs() << "\nDepths for " << printMBBReference(*MBB) << ":\n");
TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
TBI.HasValidInstrDepths = true;
TBI.CriticalPath = 0;
@@ -1044,7 +1045,7 @@
SmallVector<DataDep, 8> Deps;
for (;!Stack.empty(); Stack.pop_back()) {
MBB = Stack.back();
- DEBUG(dbgs() << "Heights for BB#" << MBB->getNumber() << ":\n");
+ DEBUG(dbgs() << "Heights for " << printMBBReference(*MBB) << ":\n");
TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
TBI.HasValidInstrHeights = true;
TBI.CriticalPath = 0;
@@ -1131,7 +1132,7 @@
// Update virtual live-in heights. They were added by addLiveIns() with a 0
// height because the final height isn't known until now.
- DEBUG(dbgs() << "BB#" << MBB->getNumber() << " Live-ins:");
+ DEBUG(dbgs() << printMBBReference(*MBB) << " Live-ins:");
for (LiveInReg &LIR : TBI.LiveIns) {
const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
LIR.Height = Heights.lookup(DefMI);
@@ -1289,7 +1290,7 @@
void MachineTraceMetrics::Ensemble::print(raw_ostream &OS) const {
OS << getName() << " ensemble:\n";
for (unsigned i = 0, e = BlockInfo.size(); i != e; ++i) {
- OS << " BB#" << i << '\t';
+ OS << " %bb." << i << '\t';
BlockInfo[i].print(OS);
OS << '\n';
}
@@ -1299,10 +1300,10 @@
if (hasValidDepth()) {
OS << "depth=" << InstrDepth;
if (Pred)
- OS << " pred=BB#" << Pred->getNumber();
+ OS << " pred=" << printMBBReference(*Pred);
else
OS << " pred=null";
- OS << " head=BB#" << Head;
+ OS << " head=%bb." << Head;
if (HasValidInstrDepths)
OS << " +instrs";
} else
@@ -1311,10 +1312,10 @@
if (hasValidHeight()) {
OS << "height=" << InstrHeight;
if (Succ)
- OS << " succ=BB#" << Succ->getNumber();
+ OS << " succ=" << printMBBReference(*Succ);
else
OS << " succ=null";
- OS << " tail=BB#" << Tail;
+ OS << " tail=%bb." << Tail;
if (HasValidInstrHeights)
OS << " +instrs";
} else
@@ -1326,18 +1327,18 @@
void MachineTraceMetrics::Trace::print(raw_ostream &OS) const {
unsigned MBBNum = &TBI - &TE.BlockInfo[0];
- OS << TE.getName() << " trace BB#" << TBI.Head << " --> BB#" << MBBNum
- << " --> BB#" << TBI.Tail << ':';
+ OS << TE.getName() << " trace %bb." << TBI.Head << " --> %bb." << MBBNum
+ << " --> %bb." << TBI.Tail << ':';
if (TBI.hasValidHeight() && TBI.hasValidDepth())
OS << ' ' << getInstrCount() << " instrs.";
if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights)
OS << ' ' << TBI.CriticalPath << " cycles.";
const MachineTraceMetrics::TraceBlockInfo *Block = &TBI;
- OS << "\nBB#" << MBBNum;
+ OS << "\n%bb." << MBBNum;
while (Block->hasValidDepth() && Block->Pred) {
unsigned Num = Block->Pred->getNumber();
- OS << " <- BB#" << Num;
+ OS << " <- " << printMBBReference(*Block->Pred);
Block = &TE.BlockInfo[Num];
}
@@ -1345,7 +1346,7 @@
OS << "\n ";
while (Block->hasValidHeight() && Block->Succ) {
unsigned Num = Block->Succ->getNumber();
- OS << " -> BB#" << Num;
+ OS << " -> " << printMBBReference(*Block->Succ);
Block = &TE.BlockInfo[Num];
}
OS << '\n';
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 2d13829..fd00a2d 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -471,9 +471,8 @@
void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB) {
assert(MBB);
report(msg, MBB->getParent());
- errs() << "- basic block: BB#" << MBB->getNumber()
- << ' ' << MBB->getName()
- << " (" << (const void*)MBB << ')';
+ errs() << "- basic block: " << printMBBReference(*MBB) << ' '
+ << MBB->getName() << " (" << (const void *)MBB << ')';
if (Indexes)
errs() << " [" << Indexes->getMBBStartIdx(MBB)
<< ';' << Indexes->getMBBEndIdx(MBB) << ')';
@@ -619,8 +618,8 @@
report("MBB has successor that isn't part of the function.", MBB);
if (!MBBInfoMap[*I].Preds.count(MBB)) {
report("Inconsistent CFG", MBB);
- errs() << "MBB is not in the predecessor list of the successor BB#"
- << (*I)->getNumber() << ".\n";
+ errs() << "MBB is not in the predecessor list of the successor "
+ << printMBBReference(*(*I)) << ".\n";
}
}
@@ -631,8 +630,8 @@
report("MBB has predecessor that isn't part of the function.", MBB);
if (!MBBInfoMap[*I].Succs.count(MBB)) {
report("Inconsistent CFG", MBB);
- errs() << "MBB is not in the successor list of the predecessor BB#"
- << (*I)->getNumber() << ".\n";
+ errs() << "MBB is not in the successor list of the predecessor "
+ << printMBBReference(*(*I)) << ".\n";
}
}
@@ -1663,8 +1662,8 @@
for (MachineBasicBlock *Pred : MBB.predecessors()) {
if (!seen.count(Pred)) {
report("Missing PHI operand", &Phi);
- errs() << "BB#" << Pred->getNumber()
- << " is a predecessor according to the CFG.\n";
+ errs() << printMBBReference(*Pred)
+ << " is a predecessor according to the CFG.\n";
}
}
}
@@ -2038,8 +2037,8 @@
report("Register not marked live out of predecessor", *PI);
report_context(LR, Reg, LaneMask);
report_context(*VNI);
- errs() << " live into BB#" << MFI->getNumber()
- << '@' << LiveInts->getMBBStartIdx(&*MFI) << ", not live before "
+ errs() << " live into " << printMBBReference(*MFI) << '@'
+ << LiveInts->getMBBStartIdx(&*MFI) << ", not live before "
<< PEnd << '\n';
continue;
}
@@ -2048,9 +2047,9 @@
if (!IsPHI && PVNI != VNI) {
report("Different value live out of predecessor", *PI);
report_context(LR, Reg, LaneMask);
- errs() << "Valno #" << PVNI->id << " live out of BB#"
- << (*PI)->getNumber() << '@' << PEnd << "\nValno #" << VNI->id
- << " live into BB#" << MFI->getNumber() << '@'
+ errs() << "Valno #" << PVNI->id << " live out of "
+ << printMBBReference(*(*PI)) << '@' << PEnd << "\nValno #"
+ << VNI->id << " live into " << printMBBReference(*MFI) << '@'
<< LiveInts->getMBBStartIdx(&*MFI) << '\n';
}
}
@@ -2201,11 +2200,11 @@
(SPState[(*I)->getNumber()].ExitValue != BBState.EntryValue ||
SPState[(*I)->getNumber()].ExitIsSetup != BBState.EntryIsSetup)) {
report("The exit stack state of a predecessor is inconsistent.", MBB);
- errs() << "Predecessor BB#" << (*I)->getNumber() << " has exit state ("
- << SPState[(*I)->getNumber()].ExitValue << ", "
- << SPState[(*I)->getNumber()].ExitIsSetup
- << "), while BB#" << MBB->getNumber() << " has entry state ("
- << BBState.EntryValue << ", " << BBState.EntryIsSetup << ").\n";
+ errs() << "Predecessor " << printMBBReference(*(*I))
+ << " has exit state (" << SPState[(*I)->getNumber()].ExitValue
+ << ", " << SPState[(*I)->getNumber()].ExitIsSetup << "), while "
+ << printMBBReference(*MBB) << " has entry state ("
+ << BBState.EntryValue << ", " << BBState.EntryIsSetup << ").\n";
}
}
@@ -2217,11 +2216,11 @@
(SPState[(*I)->getNumber()].EntryValue != BBState.ExitValue ||
SPState[(*I)->getNumber()].EntryIsSetup != BBState.ExitIsSetup)) {
report("The entry stack state of a successor is inconsistent.", MBB);
- errs() << "Successor BB#" << (*I)->getNumber() << " has entry state ("
- << SPState[(*I)->getNumber()].EntryValue << ", "
- << SPState[(*I)->getNumber()].EntryIsSetup
- << "), while BB#" << MBB->getNumber() << " has exit state ("
- << BBState.ExitValue << ", " << BBState.ExitIsSetup << ").\n";
+ errs() << "Successor " << printMBBReference(*(*I))
+ << " has entry state (" << SPState[(*I)->getNumber()].EntryValue
+ << ", " << SPState[(*I)->getNumber()].EntryIsSetup << "), while "
+ << printMBBReference(*MBB) << " has exit state ("
+ << BBState.ExitValue << ", " << BBState.ExitIsSetup << ").\n";
}
}
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 864d6d5..82bbe15 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -593,9 +593,9 @@
if (!ShouldSplit && !NoPhiElimLiveOutEarlyExit)
continue;
if (ShouldSplit) {
- DEBUG(dbgs() << printReg(Reg) << " live-out before critical edge BB#"
- << PreMBB->getNumber() << " -> BB#" << MBB.getNumber()
- << ": " << *BBI);
+ DEBUG(dbgs() << printReg(Reg) << " live-out before critical edge "
+ << printMBBReference(*PreMBB) << " -> "
+ << printMBBReference(MBB) << ": " << *BBI);
}
// If Reg is not live-in to MBB, it means it must be live-in to some
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp
index 673dc37..81dd6ef 100644
--- a/llvm/lib/CodeGen/PostRASchedulerList.cpp
+++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp
@@ -322,8 +322,8 @@
static int bbcnt = 0;
if (bbcnt++ % DebugDiv != DebugMod)
continue;
- dbgs() << "*** DEBUG scheduling " << Fn.getName()
- << ":BB#" << MBB.getNumber() << " ***\n";
+ dbgs() << "*** DEBUG scheduling " << Fn.getName() << ":"
+ << printMBBReference(MBB) << " ***\n";
}
#endif
diff --git a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
index 7fbf7dd..48b48c5 100644
--- a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
+++ b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
@@ -154,7 +154,7 @@
if (WorkList.empty())
continue;
- DEBUG(dbgs() << "BB#" << MFI->getNumber() << " has " << WorkList.size()
+ DEBUG(dbgs() << printMBBReference(*MFI) << " has " << WorkList.size()
<< " implicit defs.\n");
Changed = true;
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 131cd5a1..7aa998b 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -1612,7 +1612,7 @@
// Create separate intervals for isolated blocks with multiple uses.
if (!IntvIn && !IntvOut) {
- DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " isolated.\n");
+ DEBUG(dbgs() << printMBBReference(*BI.MBB) << " isolated.\n");
if (SA->shouldSplitSingleBlock(BI, SingleInstrs))
SE->splitSingleBlock(BI);
continue;
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 2bbefa9..09875d3 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -991,8 +991,8 @@
// Now ok to move copy.
if (CopyLeftBB) {
- DEBUG(dbgs() << "\tremovePartialRedundancy: Move the copy to BB#"
- << CopyLeftBB->getNumber() << '\t' << CopyMI);
+ DEBUG(dbgs() << "\tremovePartialRedundancy: Move the copy to "
+ << printMBBReference(*CopyLeftBB) << '\t' << CopyMI);
// Insert new copy to CopyLeftBB.
auto InsPos = CopyLeftBB->getFirstTerminator();
@@ -1010,8 +1010,8 @@
// the deleted list.
ErasedInstrs.erase(NewCopyMI);
} else {
- DEBUG(dbgs() << "\tremovePartialRedundancy: Remove the copy from BB#"
- << MBB.getNumber() << '\t' << CopyMI);
+ DEBUG(dbgs() << "\tremovePartialRedundancy: Remove the copy from "
+ << printMBBReference(MBB) << '\t' << CopyMI);
}
// Remove CopyMI.
@@ -2376,7 +2376,7 @@
if (OtherV.ErasableImplicitDef && DefMI &&
DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) {
DEBUG(dbgs() << "IMPLICIT_DEF defined at " << V.OtherVNI->def
- << " extends into BB#" << DefMI->getParent()->getNumber()
+ << " extends into " << printMBBReference(*DefMI->getParent())
<< ", keeping it.\n");
OtherV.ErasableImplicitDef = false;
}
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
index b1a4851..4b45edc 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -1043,7 +1043,7 @@
}
void ScheduleDAGInstrs::fixupKills(MachineBasicBlock &MBB) {
- DEBUG(dbgs() << "Fixup kills for BB#" << MBB.getNumber() << '\n');
+ DEBUG(dbgs() << "Fixup kills for " << printMBBReference(MBB) << '\n');
LiveRegs.init(*TRI);
LiveRegs.addLiveOuts(MBB);
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index a83f4ef..49f304c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -346,9 +346,8 @@
/// Schedule - Schedule the DAG using list scheduling.
void ScheduleDAGRRList::Schedule() {
- DEBUG(dbgs()
- << "********** List Scheduling BB#" << BB->getNumber()
- << " '" << BB->getName() << "' **********\n");
+ DEBUG(dbgs() << "********** List Scheduling " << printMBBReference(*BB)
+ << " '" << BB->getName() << "' **********\n");
CurCycle = 0;
IssueCount = 0;
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
index 54c1531..07b46b9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
@@ -93,9 +93,8 @@
/// Schedule - Schedule the DAG using list scheduling.
void ScheduleDAGVLIW::Schedule() {
- DEBUG(dbgs()
- << "********** List Scheduling BB#" << BB->getNumber()
- << " '" << BB->getName() << "' **********\n");
+ DEBUG(dbgs() << "********** List Scheduling " << printMBBReference(*BB)
+ << " '" << BB->getName() << "' **********\n");
// Build the scheduling graph.
BuildSchedGraph(AA);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index cb37137..8f47c5b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -730,8 +730,9 @@
BlockName =
(MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
}
- DEBUG(dbgs() << "Initial selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Initial selection DAG: " << printMBBReference(*FuncInfo->MBB)
+ << " '" << BlockName << "'\n";
+ CurDAG->dump());
if (ViewDAGCombine1 && MatchFilterBB)
CurDAG->viewGraph("dag-combine1 input for " + BlockName);
@@ -743,8 +744,10 @@
CurDAG->Combine(BeforeLegalizeTypes, AA, OptLevel);
}
- DEBUG(dbgs() << "Optimized lowered selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Optimized lowered selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
// Second step, hack on the DAG until it only uses operations and types that
// the target supports.
@@ -758,8 +761,10 @@
Changed = CurDAG->LegalizeTypes();
}
- DEBUG(dbgs() << "Type-legalized selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Type-legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
// Only allow creation of legal node types.
CurDAG->NewNodesMustHaveLegalTypes = true;
@@ -775,8 +780,10 @@
CurDAG->Combine(AfterLegalizeTypes, AA, OptLevel);
}
- DEBUG(dbgs() << "Optimized type-legalized selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Optimized type-legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
}
{
@@ -786,8 +793,10 @@
}
if (Changed) {
- DEBUG(dbgs() << "Vector-legalized selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Vector-legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
{
NamedRegionTimer T("legalize_types2", "Type Legalization 2", GroupName,
@@ -795,8 +804,10 @@
CurDAG->LegalizeTypes();
}
- DEBUG(dbgs() << "Vector/type-legalized selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Vector/type-legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
if (ViewDAGCombineLT && MatchFilterBB)
CurDAG->viewGraph("dag-combine-lv input for " + BlockName);
@@ -808,8 +819,10 @@
CurDAG->Combine(AfterLegalizeVectorOps, AA, OptLevel);
}
- DEBUG(dbgs() << "Optimized vector-legalized selection DAG: BB#"
- << BlockNumber << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Optimized vector-legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
}
if (ViewLegalizeDAGs && MatchFilterBB)
@@ -821,8 +834,10 @@
CurDAG->Legalize();
}
- DEBUG(dbgs() << "Legalized selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
if (ViewDAGCombine2 && MatchFilterBB)
CurDAG->viewGraph("dag-combine2 input for " + BlockName);
@@ -834,8 +849,10 @@
CurDAG->Combine(AfterLegalizeDAG, AA, OptLevel);
}
- DEBUG(dbgs() << "Optimized legalized selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Optimized legalized selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
if (OptLevel != CodeGenOpt::None)
ComputeLiveOutVRegInfo();
@@ -851,8 +868,10 @@
DoInstructionSelection();
}
- DEBUG(dbgs() << "Selected selection DAG: BB#" << BlockNumber
- << " '" << BlockName << "'\n"; CurDAG->dump());
+ DEBUG(dbgs() << "Selected selection DAG: "
+ << printMBBReference(*FuncInfo->MBB) << " '" << BlockName
+ << "'\n";
+ CurDAG->dump());
if (ViewSchedDAGs && MatchFilterBB)
CurDAG->viewGraph("scheduler input for " + BlockName);
@@ -919,9 +938,9 @@
} // end anonymous namespace
void SelectionDAGISel::DoInstructionSelection() {
- DEBUG(dbgs() << "===== Instruction selection begins: BB#"
- << FuncInfo->MBB->getNumber()
- << " '" << FuncInfo->MBB->getName() << "'\n");
+ DEBUG(dbgs() << "===== Instruction selection begins: "
+ << printMBBReference(*FuncInfo->MBB) << " '"
+ << FuncInfo->MBB->getName() << "'\n");
PreprocessISelDAG();
diff --git a/llvm/lib/CodeGen/SlotIndexes.cpp b/llvm/lib/CodeGen/SlotIndexes.cpp
index 25a1c37..184329a 100644
--- a/llvm/lib/CodeGen/SlotIndexes.cpp
+++ b/llvm/lib/CodeGen/SlotIndexes.cpp
@@ -264,7 +264,7 @@
}
for (unsigned i = 0, e = MBBRanges.size(); i != e; ++i)
- dbgs() << "BB#" << i << "\t[" << MBBRanges[i].first << ';'
+ dbgs() << "%bb." << i << "\t[" << MBBRanges[i].first << ';'
<< MBBRanges[i].second << ")\n";
}
#endif
diff --git a/llvm/lib/CodeGen/SplitKit.cpp b/llvm/lib/CodeGen/SplitKit.cpp
index 49f3133..fc85ea3 100644
--- a/llvm/lib/CodeGen/SplitKit.cpp
+++ b/llvm/lib/CodeGen/SplitKit.cpp
@@ -729,7 +729,8 @@
assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
SlotIndex End = LIS.getMBBEndIdx(&MBB);
SlotIndex Last = End.getPrevSlot();
- DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
+ DEBUG(dbgs() << " enterIntvAtEnd " << printMBBReference(MBB) << ", "
+ << Last);
VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
if (!ParentVNI) {
DEBUG(dbgs() << ": not live\n");
@@ -808,7 +809,8 @@
SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
SlotIndex Start = LIS.getMBBStartIdx(&MBB);
- DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
+ DEBUG(dbgs() << " leaveIntvAtTop " << printMBBReference(MBB) << ", "
+ << Start);
VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
if (!ParentVNI) {
@@ -906,15 +908,15 @@
// MBB isn't in a loop, it doesn't get any better. All dominators have a
// higher frequency by definition.
if (!Loop) {
- DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
- << MBB->getNumber() << " at depth 0\n");
+ DEBUG(dbgs() << "Def in " << printMBBReference(*DefMBB) << " dominates "
+ << printMBBReference(*MBB) << " at depth 0\n");
return MBB;
}
// We'll never be able to exit the DefLoop.
if (Loop == DefLoop) {
- DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
- << MBB->getNumber() << " in the same loop\n");
+ DEBUG(dbgs() << "Def in " << printMBBReference(*DefMBB) << " dominates "
+ << printMBBReference(*MBB) << " in the same loop\n");
return MBB;
}
@@ -923,8 +925,8 @@
if (Depth < BestDepth) {
BestMBB = MBB;
BestDepth = Depth;
- DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
- << MBB->getNumber() << " at depth " << Depth << '\n');
+ DEBUG(dbgs() << "Def in " << printMBBReference(*DefMBB) << " dominates "
+ << printMBBReference(*MBB) << " at depth " << Depth << '\n');
}
// Leave loop by going to the immediate dominator of the loop header.
@@ -1063,7 +1065,7 @@
DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def
<< " for parent " << ParentVNI->id << '@' << ParentVNI->def
- << " hoist to BB#" << Dom.first->getNumber() << ' '
+ << " hoist to " << printMBBReference(*Dom.first) << ' '
<< Dom.second << '\n');
}
@@ -1173,7 +1175,7 @@
if (Start != BlockStart) {
VNInfo *VNI = LI.extendInBlock(BlockStart, std::min(BlockEnd, End));
assert(VNI && "Missing def for complex mapped value");
- DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
+ DEBUG(dbgs() << ':' << VNI->id << "*" << printMBBReference(*MBB));
// MBB has its own def. Is it also live-out?
if (BlockEnd <= End)
LRC.setLiveOutValue(&*MBB, VNI);
@@ -1186,7 +1188,7 @@
// Handle the live-in blocks covered by [Start;End).
assert(Start <= BlockStart && "Expected live-in block");
while (BlockStart < End) {
- DEBUG(dbgs() << ">BB#" << MBB->getNumber());
+ DEBUG(dbgs() << ">" << printMBBReference(*MBB));
BlockEnd = LIS.getMBBEndIdx(&*MBB);
if (BlockStart == ParentVNI->def) {
// This block has the def of a parent PHI, so it isn't live-in.
@@ -1329,7 +1331,7 @@
unsigned RegIdx = RegAssign.lookup(Idx);
LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx));
MO.setReg(LI.reg);
- DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
+ DEBUG(dbgs() << " rewr " << printMBBReference(*MI->getParent()) << '\t'
<< Idx << ':' << RegIdx << '\t' << *MI);
// Extend liveness to Idx if the instruction reads reg.
@@ -1563,9 +1565,9 @@
SlotIndex Start, Stop;
std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum);
- DEBUG(dbgs() << "BB#" << MBBNum << " [" << Start << ';' << Stop
- << ") intf " << LeaveBefore << '-' << EnterAfter
- << ", live-through " << IntvIn << " -> " << IntvOut);
+ DEBUG(dbgs() << "%bb." << MBBNum << " [" << Start << ';' << Stop << ") intf "
+ << LeaveBefore << '-' << EnterAfter << ", live-through "
+ << IntvIn << " -> " << IntvOut);
assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks");
@@ -1665,7 +1667,7 @@
SlotIndex Start, Stop;
std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
- DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop
+ DEBUG(dbgs() << printMBBReference(*BI.MBB) << " [" << Start << ';' << Stop
<< "), uses " << BI.FirstInstr << '-' << BI.LastInstr
<< ", reg-in " << IntvIn << ", leave before " << LeaveBefore
<< (BI.LiveOut ? ", stack-out" : ", killed in block"));
@@ -1757,7 +1759,7 @@
SlotIndex Start, Stop;
std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
- DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop
+ DEBUG(dbgs() << printMBBReference(*BI.MBB) << " [" << Start << ';' << Stop
<< "), uses " << BI.FirstInstr << '-' << BI.LastInstr
<< ", reg-out " << IntvOut << ", enter after " << EnterAfter
<< (BI.LiveIn ? ", stack-in" : ", defined in block"));
diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index 0a7be1d..18bba42 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -739,7 +739,7 @@
} else {
for (auto Slot : slots) {
DEBUG(dbgs() << "Found a use of slot #" << Slot);
- DEBUG(dbgs() << " at BB#" << MBB->getNumber() << " index ");
+ DEBUG(dbgs() << " at " << printMBBReference(*MBB) << " index ");
DEBUG(Indexes->getInstructionIndex(MI).print(dbgs()));
const AllocaInst *Allocation = MFI->getObjectAllocation(Slot);
if (Allocation) {
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index 7adf9b0..63eb6cc 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -111,9 +111,10 @@
}
}
if (!Found) {
- dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
- dbgs() << " missing input from predecessor BB#"
- << PredBB->getNumber() << '\n';
+ dbgs() << "Malformed PHI in " << printMBBReference(*MBB) << ": "
+ << *MI;
+ dbgs() << " missing input from predecessor "
+ << printMBBReference(*PredBB) << '\n';
llvm_unreachable(nullptr);
}
}
@@ -121,15 +122,16 @@
for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
MachineBasicBlock *PHIBB = MI->getOperand(i + 1).getMBB();
if (CheckExtra && !Preds.count(PHIBB)) {
- dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber() << ": "
- << *MI;
- dbgs() << " extra input from predecessor BB#" << PHIBB->getNumber()
- << '\n';
+ dbgs() << "Warning: malformed PHI in " << printMBBReference(*MBB)
+ << ": " << *MI;
+ dbgs() << " extra input from predecessor "
+ << printMBBReference(*PHIBB) << '\n';
llvm_unreachable(nullptr);
}
if (PHIBB->getNumber() < 0) {
- dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
- dbgs() << " non-existing BB#" << PHIBB->getNumber() << '\n';
+ dbgs() << "Malformed PHI in " << printMBBReference(*MBB) << ": "
+ << *MI;
+ dbgs() << " non-existing " << printMBBReference(*PHIBB) << '\n';
llvm_unreachable(nullptr);
}
}
@@ -783,7 +785,8 @@
MachineBasicBlock *ForcedLayoutPred,
SmallVectorImpl<MachineBasicBlock *> &TDBBs,
SmallVectorImpl<MachineInstr *> &Copies) {
- DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
+ DEBUG(dbgs() << "\n*** Tail-duplicating " << printMBBReference(*TailBB)
+ << '\n');
DenseSet<unsigned> UsedByPhi;
getRegsUsedByPHIs(*TailBB, &UsedByPhi);