[CodeGen] Unify MBB reference format in both MIR and debug output

As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

llvm-svn: 319665
diff --git a/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll b/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
index 6d62fd3..6f1e18f 100644
--- a/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
+++ b/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
@@ -4,14 +4,14 @@
 
 define void @i24_or(i24* %a) {
 ; LE-LABEL: i24_or:
-; LE:       @ BB#0:
+; LE:       @ %bb.0:
 ; LE-NEXT:    ldrh r1, [r0]
 ; LE-NEXT:    orr r1, r1, #384
 ; LE-NEXT:    strh r1, [r0]
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i24_or:
-; BE:       @ BB#0:
+; BE:       @ %bb.0:
 ; BE-NEXT:    ldrh r1, [r0]
 ; BE-NEXT:    ldrb r2, [r0, #2]
 ; BE-NEXT:    orr r1, r2, r1, lsl #8
@@ -28,7 +28,7 @@
 
 define void @i24_and_or(i24* %a) {
 ; LE-LABEL: i24_and_or:
-; LE:       @ BB#0:
+; LE:       @ %bb.0:
 ; LE-NEXT:    ldrh r1, [r0]
 ; LE-NEXT:    mov r2, #16256
 ; LE-NEXT:    orr r2, r2, #49152
@@ -38,7 +38,7 @@
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i24_and_or:
-; BE:       @ BB#0:
+; BE:       @ %bb.0:
 ; BE-NEXT:    mov r1, #128
 ; BE-NEXT:    strb r1, [r0, #2]
 ; BE-NEXT:    ldrh r1, [r0]
@@ -54,7 +54,7 @@
 
 define void @i24_insert_bit(i24* %a, i1 zeroext %bit) {
 ; LE-LABEL: i24_insert_bit:
-; LE:       @ BB#0:
+; LE:       @ %bb.0:
 ; LE-NEXT:    mov r3, #255
 ; LE-NEXT:    ldrh r2, [r0]
 ; LE-NEXT:    orr r3, r3, #57088
@@ -64,7 +64,7 @@
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i24_insert_bit:
-; BE:       @ BB#0:
+; BE:       @ %bb.0:
 ; BE-NEXT:    ldrh r2, [r0]
 ; BE-NEXT:    mov r3, #57088
 ; BE-NEXT:    orr r3, r3, #16711680
@@ -84,14 +84,14 @@
 
 define void @i56_or(i56* %a) {
 ; LE-LABEL: i56_or:
-; LE:       @ BB#0:
+; LE:       @ %bb.0:
 ; LE-NEXT:    ldr r1, [r0]
 ; LE-NEXT:    orr r1, r1, #384
 ; LE-NEXT:    str r1, [r0]
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i56_or:
-; BE:       @ BB#0:
+; BE:       @ %bb.0:
 ; BE-NEXT:    mov r1, r0
 ; BE-NEXT:    ldr r12, [r0]
 ; BE-NEXT:    ldrh r2, [r1, #4]!
@@ -114,7 +114,7 @@
 
 define void @i56_and_or(i56* %a) {
 ; LE-LABEL: i56_and_or:
-; LE:       @ BB#0:
+; LE:       @ %bb.0:
 ; LE-NEXT:    ldr r1, [r0]
 ; LE-NEXT:    orr r1, r1, #384
 ; LE-NEXT:    bic r1, r1, #127
@@ -122,7 +122,7 @@
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i56_and_or:
-; BE:       @ BB#0:
+; BE:       @ %bb.0:
 ; BE-NEXT:    mov r1, r0
 ; BE-NEXT:    ldr r12, [r0]
 ; BE-NEXT:    ldrh r2, [r1, #4]!
@@ -147,7 +147,7 @@
 
 define void @i56_insert_bit(i56* %a, i1 zeroext %bit) {
 ; LE-LABEL: i56_insert_bit:
-; LE:       @ BB#0:
+; LE:       @ %bb.0:
 ; LE-NEXT:    ldr r2, [r0]
 ; LE-NEXT:    bic r2, r2, #8192
 ; LE-NEXT:    orr r1, r2, r1, lsl #13
@@ -155,7 +155,7 @@
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i56_insert_bit:
-; BE:       @ BB#0:
+; BE:       @ %bb.0:
 ; BE-NEXT:    .save {r11, lr}
 ; BE-NEXT:    push {r11, lr}
 ; BE-NEXT:    mov r2, r0