[CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.
The MIR printer prints the IR name of a MBB only for block definitions.
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix
Differential Revision: https://reviews.llvm.org/D40422
llvm-svn: 319665
diff --git a/llvm/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir b/llvm/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir
index 47da85b..c685a0c 100644
--- a/llvm/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir
+++ b/llvm/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir
@@ -11,7 +11,7 @@
# then created code, where the first predicated instruction has incorrect
# implicit use of r0:
#
-# BB#0:
+# %bb.0:
# Live Ins: %R0
# %R1<def> = A2_sxth %R0<kill> ; hoisted, kills r0
# A2_nop %P0<imp-def>
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-redef-imm.mir b/llvm/test/CodeGen/Hexagon/hwloop-redef-imm.mir
index 014908e..7b6044c 100644
--- a/llvm/test/CodeGen/Hexagon/hwloop-redef-imm.mir
+++ b/llvm/test/CodeGen/Hexagon/hwloop-redef-imm.mir
@@ -8,10 +8,10 @@
# loop setup in the preheader).
# CHECK: [[R0:%[0-9]+]]:intregs = A2_tfrsi 1920
-# CHECK: J2_loop0r %bb.1.b1, [[R0]]
+# CHECK: J2_loop0r %bb.1, [[R0]]
#
# CHECK: bb.1.b1 (address-taken):
-# CHECK: ENDLOOP0 %bb.1.b1
+# CHECK: ENDLOOP0 %bb.1
--- |
diff --git a/llvm/test/CodeGen/Hexagon/ifcvt-edge-weight.ll b/llvm/test/CodeGen/Hexagon/ifcvt-edge-weight.ll
index 341567e..250a819 100644
--- a/llvm/test/CodeGen/Hexagon/ifcvt-edge-weight.ll
+++ b/llvm/test/CodeGen/Hexagon/ifcvt-edge-weight.ll
@@ -1,8 +1,8 @@
; RUN: llc -march=hexagon -mcpu=hexagonv5 -hexagon-eif=0 -print-machineinstrs=if-converter %s -o /dev/null 2>&1 | FileCheck %s
; Check that the edge weights are updated correctly after if-conversion.
-; CHECK: BB#3:
-; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}10.00%) BB#1({{[0-9a-fx/= ]+}}90.00%)
+; CHECK: %bb.3:
+; CHECK: Successors according to CFG: %bb.2({{[0-9a-fx/= ]+}}10.00%) %bb.1({{[0-9a-fx/= ]+}}90.00%)
@a = external global i32
@d = external global i32