[CodeGen] Unify MBB reference format in both MIR and debug output

As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

llvm-svn: 319665
diff --git a/llvm/test/CodeGen/PowerPC/testComparesigtsll.ll b/llvm/test/CodeGen/PowerPC/testComparesigtsll.ll
index bd681f9..75314d7 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesigtsll.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesigtsll.ll
@@ -10,7 +10,7 @@
 ; Function Attrs: norecurse nounwind readnone
 define signext i32 @test_igtsll(i64 %a, i64 %b) {
 ; CHECK-LABEL: test_igtsll:
-; CHECK:       # BB#0: # %entry
+; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    sradi [[REG1:r[0-9]+]], r4, 63
 ; CHECK-NEXT:    rldicl [[REG2:r[0-9]+]], r3, 1, 63
 ; CHECK-NEXT:    subfc [[REG3:r[0-9]+]], r3, r4
@@ -26,7 +26,7 @@
 ; Function Attrs: norecurse nounwind readnone
 define signext i32 @test_igtsll_sext(i64 %a, i64 %b) {
 ; CHECK-LABEL: test_igtsll_sext:
-; CHECK:       # BB#0: # %entry
+; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    sradi [[REG1:r[0-9]+]], r4, 63
 ; CHECK-NEXT:    rldicl [[REG2:r[0-9]+]], r3, 1, 63
 ; CHECK-NEXT:    subfc [[REG3:r[0-9]+]], r3, r4
@@ -44,7 +44,7 @@
 ; Function Attrs: norecurse nounwind readnone
 define signext i32 @test_igtsll_z(i64 %a) {
 ; CHECK-LABEL: test_igtsll_z:
-; CHECK:       # BB#0: # %entry
+; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addi r4, r3, -1
 ; CHECK-NEXT:    nor r3, r4, r3
 ; CHECK-NEXT:    rldicl r3, r3, 1, 63
@@ -70,7 +70,7 @@
 ; Function Attrs: norecurse nounwind
 define void @test_igtsll_store(i64 %a, i64 %b) {
 ; CHECK-LABEL: test_igtsll_store:
-; CHECK:       # BB#0: # %entry
+; CHECK:       # %bb.0: # %entry
 ; CHECK:         sradi [[REG1:r[0-9]+]], r4, 63
 ; CHECK:         rldicl [[REG2:r[0-9]+]], r3, 1, 63
 ; CHECK-DIAG:    subfc [[REG3:r[0-9]+]], r3, r4
@@ -87,7 +87,7 @@
 ; Function Attrs: norecurse nounwind
 define void @test_igtsll_sext_store(i64 %a, i64 %b) {
 ; CHECK-LABEL: test_igtsll_sext_store:
-; CHECK:       # BB#0: # %entry
+; CHECK:       # %bb.0: # %entry
 ; CHECK:         sradi [[REG1:r[0-9]+]], r4, 63
 ; CHECK:         rldicl [[REG2:r[0-9]+]], r3, 1, 63
 ; CHECK-DIAG:    subfc [[REG3:r[0-9]+]], r3, r4
@@ -105,7 +105,7 @@
 ; Function Attrs: norecurse nounwind
 define void @test_igtsll_z_store(i64 %a) {
 ; CHECK-LABEL: test_igtsll_z_store:
-; CHECK:       # BB#0: # %entry
+; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
 ; CHECK-NEXT:    addi r5, r3, -1
 ; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)