[CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.
The MIR printer prints the IR name of a MBB only for block definitions.
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix
Differential Revision: https://reviews.llvm.org/D40422
llvm-svn: 319665
diff --git a/llvm/test/CodeGen/RISCV/mem.ll b/llvm/test/CodeGen/RISCV/mem.ll
index b06382f..6446034 100644
--- a/llvm/test/CodeGen/RISCV/mem.ll
+++ b/llvm/test/CodeGen/RISCV/mem.ll
@@ -6,7 +6,7 @@
define i32 @lb(i8 *%a) nounwind {
; RV32I-LABEL: lb:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lb a1, 0(a0)
; RV32I-NEXT: lb a0, 1(a0)
; RV32I-NEXT: jalr zero, ra, 0
@@ -20,7 +20,7 @@
define i32 @lh(i16 *%a) nounwind {
; RV32I-LABEL: lh:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lh a1, 0(a0)
; RV32I-NEXT: lh a0, 4(a0)
; RV32I-NEXT: jalr zero, ra, 0
@@ -34,7 +34,7 @@
define i32 @lw(i32 *%a) nounwind {
; RV32I-LABEL: lw:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lw a1, 0(a0)
; RV32I-NEXT: lw a0, 12(a0)
; RV32I-NEXT: jalr zero, ra, 0
@@ -46,7 +46,7 @@
define i32 @lbu(i8 *%a) nounwind {
; RV32I-LABEL: lbu:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lbu a1, 0(a0)
; RV32I-NEXT: lbu a0, 4(a0)
; RV32I-NEXT: add a0, a0, a1
@@ -62,7 +62,7 @@
define i32 @lhu(i16 *%a) nounwind {
; RV32I-LABEL: lhu:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lhu a1, 0(a0)
; RV32I-NEXT: lhu a0, 10(a0)
; RV32I-NEXT: add a0, a0, a1
@@ -80,7 +80,7 @@
define void @sb(i8 *%a, i8 %b) nounwind {
; RV32I-LABEL: sb:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: sb a1, 6(a0)
; RV32I-NEXT: sb a1, 0(a0)
; RV32I-NEXT: jalr zero, ra, 0
@@ -92,7 +92,7 @@
define void @sh(i16 *%a, i16 %b) nounwind {
; RV32I-LABEL: sh:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: sh a1, 14(a0)
; RV32I-NEXT: sh a1, 0(a0)
; RV32I-NEXT: jalr zero, ra, 0
@@ -104,7 +104,7 @@
define void @sw(i32 *%a, i32 %b) nounwind {
; RV32I-LABEL: sw:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: sw a1, 32(a0)
; RV32I-NEXT: sw a1, 0(a0)
; RV32I-NEXT: jalr zero, ra, 0
@@ -117,7 +117,7 @@
; Check load and store to an i1 location
define i32 @load_sext_zext_anyext_i1(i1 *%a) nounwind {
; RV32I-LABEL: load_sext_zext_anyext_i1:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lb a1, 0(a0)
; RV32I-NEXT: lbu a1, 1(a0)
; RV32I-NEXT: lbu a0, 2(a0)
@@ -139,7 +139,7 @@
define i16 @load_sext_zext_anyext_i1_i16(i1 *%a) nounwind {
; RV32I-LABEL: load_sext_zext_anyext_i1_i16:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lb a1, 0(a0)
; RV32I-NEXT: lbu a1, 1(a0)
; RV32I-NEXT: lbu a0, 2(a0)
@@ -165,7 +165,7 @@
define i32 @lw_sw_global(i32 %a) nounwind {
; TODO: the addi should be folded in to the lw/sw operations
; RV32I-LABEL: lw_sw_global:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lui a1, %hi(G)
; RV32I-NEXT: addi a2, a1, %lo(G)
; RV32I-NEXT: lw a1, 0(a2)
@@ -188,7 +188,7 @@
define i32 @lw_sw_constant(i32 %a) nounwind {
; TODO: the addi should be folded in to the lw/sw
; RV32I-LABEL: lw_sw_constant:
-; RV32I: # BB#0:
+; RV32I: # %bb.0:
; RV32I-NEXT: lui a1, 912092
; RV32I-NEXT: addi a2, a1, -273
; RV32I-NEXT: lw a1, 0(a2)