[mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases
Add the instruction alias sgtu (register form only), two operand forms of
s[rl]l and sra, and missing single/two operand forms of dnegu/neg.
Reviewers: dsanders
Differential Revision: https://reviews.llvm.org/D22752
llvm-svn: 276736
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
index 3922946..fdf3c5f 100644
--- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
@@ -1095,6 +1095,18 @@
(TLTU_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0), 1>;
def : MipsInstAlias<"tne $rs, $rt",
(TNE_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0), 1>;
+ def : MipsInstAlias<
+ "sgt $rd, $rs, $rt",
+ (SLT_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
+ def : MipsInstAlias<
+ "sgt $rs, $rt",
+ (SLT_MM GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
+ def : MipsInstAlias<
+ "sgtu $rd, $rs, $rt",
+ (SLTu_MM GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
+ def : MipsInstAlias<
+ "sgtu $rs, $rt",
+ (SLTu_MM GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
def : MipsInstAlias<"slt $rs, $rt, $imm",
(SLTi_MM GPR32Opnd:$rs, GPR32Opnd:$rt,
simm32_relaxed:$imm), 0>;