[LLDB][MIPS] Emulation of MIPS64 floating-point branch instructions
Patch by Jaydeep Patil
SUMMARY:
1. Added emulation of MIPS64 floating-point branch instructions
2. Updated GetRegisterInfo to recognize floating-point registers
3. Provided CPU information while creating createMCSubtargetInfo in disassembler
4. Bug fix in emulation of JIC and JIALC
5. Correct identification of breakpoint when set in a delay slot of a branch instruction
Reviewers: clayborg
Subscribers: bhushan, mohit.bhakkad, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D10355
llvm-svn: 239996
diff --git a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.h b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.h
index 6ab9e9a..4c32e25 100644
--- a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.h
+++ b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.h
@@ -41,7 +41,7 @@
class LLVMCDisassembler
{
public:
- LLVMCDisassembler (const char *triple, unsigned flavor, DisassemblerLLVMC &owner);
+ LLVMCDisassembler (const char *triple, const char *cpu, unsigned flavor, DisassemblerLLVMC &owner);
~LLVMCDisassembler();