commit 28fdc4272d598bdb7b0696ac22c20e9a41836c03
author Tim Northover <tnorthover@apple.com> Mon Aug 15 21:13:17 2016 +0000
committer Tim Northover <tnorthover@apple.com> Mon Aug 15 21:13:17 2016 +0000
tree 2d53633f14414e74c2ba78479b045eaeed7f5c71
parent ad71543972e1f6c8587ef13ce9547eafc79d7fab

GlobalISel: support loads and stores of strange types.

Before we mischaracterized structs and i1 types as a scalar with size 0 in
various ways.

llvm-svn: 278744

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 3f396cc..ee5e8d6 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -45,7 +45,6 @@
     // we need to concat together to produce the value.
     assert(Val.getType()->isSized() &&
            "Don't know how to create an empty vreg");
-    assert(!Val.getType()->isAggregateType() && "Not yet implemented");
     unsigned Size = DL->getTypeSizeInBits(Val.getType());
     unsigned VReg = MRI->createGenericVirtualRegister(Size);
     ValReg = VReg;
@@ -139,13 +138,13 @@
   MachineFunction &MF = MIRBuilder.getMF();
   unsigned Res = getOrCreateVReg(LI);
   unsigned Addr = getOrCreateVReg(*LI.getPointerOperand());
-  LLT VTy{*LI.getType()}, PTy{*LI.getPointerOperand()->getType()};
+  LLT VTy{*LI.getType(), DL}, PTy{*LI.getPointerOperand()->getType()};
 
   MIRBuilder.buildLoad(
       VTy, PTy, Res, Addr,
-      *MF.getMachineMemOperand(MachinePointerInfo(LI.getPointerOperand()),
-                               MachineMemOperand::MOLoad,
-                               VTy.getSizeInBits() / 8, getMemOpAlignment(LI)));
+      *MF.getMachineMemOperand(
+          MachinePointerInfo(LI.getPointerOperand()), MachineMemOperand::MOLoad,
+          DL->getTypeStoreSize(LI.getType()), getMemOpAlignment(LI)));
   return true;
 }
 
@@ -156,14 +155,16 @@
   MachineFunction &MF = MIRBuilder.getMF();
   unsigned Val = getOrCreateVReg(*SI.getValueOperand());
   unsigned Addr = getOrCreateVReg(*SI.getPointerOperand());
-  LLT VTy{*SI.getValueOperand()->getType()},
+  LLT VTy{*SI.getValueOperand()->getType(), DL},
       PTy{*SI.getPointerOperand()->getType()};
 
   MIRBuilder.buildStore(
       VTy, PTy, Val, Addr,
-      *MF.getMachineMemOperand(MachinePointerInfo(SI.getPointerOperand()),
-                               MachineMemOperand::MOStore,
-                               VTy.getSizeInBits() / 8, getMemOpAlignment(SI)));
+      *MF.getMachineMemOperand(
+          MachinePointerInfo(SI.getPointerOperand()),
+          MachineMemOperand::MOStore,
+          DL->getTypeStoreSize(SI.getValueOperand()->getType()),
+          getMemOpAlignment(SI)));
   return true;
 }
 

llvm/lib/CodeGen/LowLevelType.cpp

diff --git a/llvm/lib/CodeGen/LowLevelType.cpp b/llvm/lib/CodeGen/LowLevelType.cpp
index c81535c..b6f82ed 100644
--- a/llvm/lib/CodeGen/LowLevelType.cpp
+++ b/llvm/lib/CodeGen/LowLevelType.cpp
@@ -13,11 +13,12 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
-LLT::LLT(const Type &Ty) {
+LLT::LLT(Type &Ty, const DataLayout *DL) {
   if (auto VTy = dyn_cast<VectorType>(&Ty)) {
     SizeOrAddrSpace = VTy->getElementType()->getPrimitiveSizeInBits();
     NumElements = VTy->getNumElements();
@@ -30,8 +31,10 @@
     // Aggregates are no different from real scalars as far as GlobalISel is
     // concerned.
     Kind = Scalar;
-    SizeOrAddrSpace = Ty.getPrimitiveSizeInBits();
+    SizeOrAddrSpace =
+        DL ? DL->getTypeSizeInBits(&Ty) : Ty.getPrimitiveSizeInBits();
     NumElements = 1;
+    assert(SizeOrAddrSpace != 0 && "invalid zero-sized type");
   } else {
     Kind = Unsized;
     SizeOrAddrSpace = NumElements = 0;