[Hexagon] Fix operand-swapping PatFrag for atomic stores
PatFrag now has the atomicity information stored as bit fields. They
need to be copied to the new PatFrag.
llvm-svn: 320855
diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td
index 8ed9a8d..05c8f87 100644
--- a/llvm/lib/Target/Hexagon/HexagonPatterns.td
+++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td
@@ -2142,9 +2142,13 @@
// To use atomic stores with the patterns, they need to have their operands
// swapped. This relies on the knowledge that the F.Fragment uses names
// "ptr" and "val".
-class SwapSt<PatFrag F>
+class AtomSt<PatFrag F>
: PatFrag<(ops node:$val, node:$ptr), F.Fragment, F.PredicateCode,
- F.OperandTransform>;
+ F.OperandTransform> {
+ let IsAtomic = F.IsAtomic;
+ let MemoryVT = F.MemoryVT;
+}
+
def IMM_BYTE : SDNodeXForm<imm, [{
// -1 can be represented as 255, etc.
@@ -2261,10 +2265,10 @@
def: Storea_pat<store, I64, addrgp, S2_storerdgp>;
def: Storea_pat<store, F32, addrgp, S2_storerigp>;
def: Storea_pat<store, F64, addrgp, S2_storerdgp>;
- def: Storea_pat<SwapSt<atomic_store_8>, I32, addrgp, S2_storerbgp>;
- def: Storea_pat<SwapSt<atomic_store_16>, I32, addrgp, S2_storerhgp>;
- def: Storea_pat<SwapSt<atomic_store_32>, I32, addrgp, S2_storerigp>;
- def: Storea_pat<SwapSt<atomic_store_64>, I64, addrgp, S2_storerdgp>;
+ def: Storea_pat<AtomSt<atomic_store_8>, I32, addrgp, S2_storerbgp>;
+ def: Storea_pat<AtomSt<atomic_store_16>, I32, addrgp, S2_storerhgp>;
+ def: Storea_pat<AtomSt<atomic_store_32>, I32, addrgp, S2_storerigp>;
+ def: Storea_pat<AtomSt<atomic_store_64>, I64, addrgp, S2_storerdgp>;
def: Stoream_pat<truncstorei8, I64, addrgp, LoReg, S2_storerbgp>;
def: Stoream_pat<truncstorei16, I64, addrgp, LoReg, S2_storerhgp>;
@@ -2280,10 +2284,10 @@
def: Storea_pat<store, I64, anyimm3, PS_storerdabs>;
def: Storea_pat<store, F32, anyimm2, PS_storeriabs>;
def: Storea_pat<store, F64, anyimm3, PS_storerdabs>;
- def: Storea_pat<SwapSt<atomic_store_8>, I32, anyimm0, PS_storerbabs>;
- def: Storea_pat<SwapSt<atomic_store_16>, I32, anyimm1, PS_storerhabs>;
- def: Storea_pat<SwapSt<atomic_store_32>, I32, anyimm2, PS_storeriabs>;
- def: Storea_pat<SwapSt<atomic_store_64>, I64, anyimm3, PS_storerdabs>;
+ def: Storea_pat<AtomSt<atomic_store_8>, I32, anyimm0, PS_storerbabs>;
+ def: Storea_pat<AtomSt<atomic_store_16>, I32, anyimm1, PS_storerhabs>;
+ def: Storea_pat<AtomSt<atomic_store_32>, I32, anyimm2, PS_storeriabs>;
+ def: Storea_pat<AtomSt<atomic_store_64>, I64, anyimm3, PS_storerdabs>;
def: Stoream_pat<truncstorei8, I64, anyimm0, LoReg, PS_storerbabs>;
def: Stoream_pat<truncstorei16, I64, anyimm1, LoReg, PS_storerhabs>;
@@ -2413,10 +2417,10 @@
defm: Storexim_pat<truncstorei32, I64, anyimm2, LoReg, S2_storeri_io>;
defm: Storexim_pat<store, I1, anyimm0, I1toI32, S2_storerb_io>;
- defm: Storexi_pat<SwapSt<atomic_store_8>, I32, anyimm0, S2_storerb_io>;
- defm: Storexi_pat<SwapSt<atomic_store_16>, I32, anyimm1, S2_storerh_io>;
- defm: Storexi_pat<SwapSt<atomic_store_32>, I32, anyimm2, S2_storeri_io>;
- defm: Storexi_pat<SwapSt<atomic_store_64>, I64, anyimm3, S2_storerd_io>;
+ defm: Storexi_pat<AtomSt<atomic_store_8>, I32, anyimm0, S2_storerb_io>;
+ defm: Storexi_pat<AtomSt<atomic_store_16>, I32, anyimm1, S2_storerh_io>;
+ defm: Storexi_pat<AtomSt<atomic_store_32>, I32, anyimm2, S2_storeri_io>;
+ defm: Storexi_pat<AtomSt<atomic_store_64>, I64, anyimm3, S2_storerd_io>;
}
// Reg+Reg
@@ -2457,10 +2461,10 @@
def: Storexim_base_pat<truncstorei32, I64, LoReg, S2_storeri_io>;
def: Storexim_base_pat<store, I1, I1toI32, S2_storerb_io>;
- def: Storexi_base_pat<SwapSt<atomic_store_8>, I32, S2_storerb_io>;
- def: Storexi_base_pat<SwapSt<atomic_store_16>, I32, S2_storerh_io>;
- def: Storexi_base_pat<SwapSt<atomic_store_32>, I32, S2_storeri_io>;
- def: Storexi_base_pat<SwapSt<atomic_store_64>, I64, S2_storerd_io>;
+ def: Storexi_base_pat<AtomSt<atomic_store_8>, I32, S2_storerb_io>;
+ def: Storexi_base_pat<AtomSt<atomic_store_16>, I32, S2_storerh_io>;
+ def: Storexi_base_pat<AtomSt<atomic_store_32>, I32, S2_storeri_io>;
+ def: Storexi_base_pat<AtomSt<atomic_store_64>, I64, S2_storerd_io>;
}
// HVX stores