commit 2a007e05a09986d96dabe1d38a5e7947b20006a2
author Alexey Bataev <a.bataev@hotmail.com> Mon Oct 02 14:20:58 2017 +0000
committer Alexey Bataev <a.bataev@hotmail.com> Mon Oct 02 14:20:58 2017 +0000
tree 7291604102b86e7754bc16a23f0e84de8b7d9bce
parent 7998d3707640d43e7e2b9215b76cf011d02102f0

[OPENMP] Simplify codegen for non-offloading code.

Simplified and generalized codegen for non-offloading part that works if
offloading is failed or condition of the `if` clause is `false`.

llvm-svn: 314670

clang/test/OpenMP/target_parallel_if_codegen.cpp

diff --git a/clang/test/OpenMP/target_parallel_if_codegen.cpp b/clang/test/OpenMP/target_parallel_if_codegen.cpp
index 0aebcc2..215d8f9 100644
--- a/clang/test/OpenMP/target_parallel_if_codegen.cpp
+++ b/clang/test/OpenMP/target_parallel_if_codegen.cpp
@@ -130,8 +130,6 @@
   return a;
 }
 
-
-
 //
 // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]])
 //
@@ -148,9 +146,7 @@
 // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
 //
 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 0)
-// CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align
-// CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align
-// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
+// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
 // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
 //
 // CHECK:       [[FAIL]]
@@ -176,27 +172,17 @@
 //
 // CHECK:       [[IF_THEN]]
 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0)
-// CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align
-// CHECK:       br label {{%?}}[[END:.+]]
-//
-// CHECK:       [[IF_ELSE]]
-// CHECK:       store i32 -1, i32* [[RHV]], align
-// CHECK:       br label {{%?}}[[END]]
-//
-// CHECK:       [[END]]
-// CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align
-// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
-// CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
-//
+// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
+// CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
 // CHECK:       [[FAIL]]
 // CHECK:       call void [[HVT2:@.+]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]])
-// CHECK:       br label {{%?}}[[END]]
+// CHECK-NEXT:  br label %[[END]]
 // CHECK:       [[END]]
-
-
-
-
-
+// CHECK-NEXT:  br label %[[IFEND:.+]]
+// CHECK:       [[IF_ELSE]]
+// CHECK:       call void [[HVT2]]([[S1]]* {{%.+}}, i[[SZ]] [[ARG]])
+// CHECK-NEXT:  br label %[[IFEND]]
+// CHECK:       [[IFEND]]
 
 //
 // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]])
@@ -218,22 +204,17 @@
 //
 // CHECK:       [[IF_THEN]]
 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 0)
-// CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align
-// CHECK:       br label {{%?}}[[END:.+]]
-//
-// CHECK:       [[IF_ELSE]]
-// CHECK:       store i32 -1, i32* [[RHV]], align
-// CHECK:       br label {{%?}}[[END]]
-//
-// CHECK:       [[END]]
-// CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align
-// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
-// CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
-//
+// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
+// CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
 // CHECK:       [[FAIL]]
 // CHECK:       call void [[HVT3:@.+]](i[[SZ]] [[ARG]])
-// CHECK:       br label {{%?}}[[END]]
+// CHECK-NEXT:  br label %[[END]]
 // CHECK:       [[END]]
+// CHECK-NEXT:  br label %[[IFEND:.+]]
+// CHECK:       [[IF_ELSE]]
+// CHECK:       call void [[HVT3]](i[[SZ]] [[ARG]])
+// CHECK-NEXT:  br label %[[IFEND]]
+// CHECK:       [[IFEND]]
 //
 //
 //
@@ -244,22 +225,17 @@
 //
 // CHECK:       [[IF_THEN]]
 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 0)
-// CHECK:       store i32 [[RET]], i32* [[RHV:%.+]], align
-// CHECK:       br label {{%?}}[[END:.+]]
-//
-// CHECK:       [[IF_ELSE]]
-// CHECK:       store i32 -1, i32* [[RHV]], align
-// CHECK:       br label {{%?}}[[END]]
-//
-// CHECK:       [[END]]
-// CHECK:       [[RET2:%.+]] = load i32, i32* [[RHV]], align
-// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
-// CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
-//
+// CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
+// CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
 // CHECK:       [[FAIL]]
 // CHECK:       call void [[HVT4:@.+]]()
-// CHECK:       br label {{%?}}[[END]]
+// CHECK-NEXT:  br label %[[END]]
 // CHECK:       [[END]]
+// CHECK-NEXT:  br label %[[IFEND:.+]]
+// CHECK:       [[IF_ELSE]]
+// CHECK:       call void [[HVT4]]()
+// CHECK-NEXT:  br label %[[IFEND]]
+// CHECK:       [[IFEND]]
 
 
 
@@ -270,9 +246,7 @@
 // CHECK: define {{.*}}[[FTEMPLATE]]
 //
 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 0)
-// CHECK-NEXT:  store i32 [[RET]], i32* [[RHV:%.+]], align
-// CHECK-NEXT:  [[RET2:%.+]] = load i32, i32* [[RHV]], align
-// CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
+// CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
 // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
 //
 // CHECK:       [[FAIL]]
@@ -284,9 +258,7 @@
 //
 //
 // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i32 -1, i8* @{{[^,]+}}, i32 2, {{.*}}, i32 1, i32 0)
-// CHECK-NEXT:  store i32 [[RET]], i32* [[RHV:%.+]], align
-// CHECK-NEXT:  [[RET2:%.+]] = load i32, i32* [[RHV]], align
-// CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
+// CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
 // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
 //
 // CHECK:       [[FAIL]]