[AMDGPU] Switch to the new addr space mapping by default
This requires corresponding clang change.
Differential Revision: https://reviews.llvm.org/D40955
llvm-svn: 324101
diff --git a/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll b/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
index 9b75c44..8fdcfe5 100644
--- a/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
+++ b/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
@@ -18,8 +18,8 @@
; GCN-NOT: v_mov
; GCN: ds_write_b32 v0, v0
define void @func_mov_fi_i32() #0 {
- %alloca = alloca i32
- store volatile i32* %alloca, i32* addrspace(3)* undef
+ %alloca = alloca i32, addrspace(5)
+ store volatile i32 addrspace(5)* %alloca, i32 addrspace(5)* addrspace(3)* undef
ret void
}
@@ -42,9 +42,9 @@
; GCN-NOT: v_mov
; GCN: ds_write_b32 v0, v0
define void @func_add_constant_to_fi_i32() #0 {
- %alloca = alloca [2 x i32], align 4
- %gep0 = getelementptr inbounds [2 x i32], [2 x i32]* %alloca, i32 0, i32 1
- store volatile i32* %gep0, i32* addrspace(3)* undef
+ %alloca = alloca [2 x i32], align 4, addrspace(5)
+ %gep0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(5)* %alloca, i32 0, i32 1
+ store volatile i32 addrspace(5)* %gep0, i32 addrspace(5)* addrspace(3)* undef
ret void
}
@@ -64,8 +64,8 @@
; GCN-NOT: v_mov
; GCN: ds_write_b32 v0, v0
define void @func_other_fi_user_i32() #0 {
- %alloca = alloca [2 x i32], align 4
- %ptrtoint = ptrtoint [2 x i32]* %alloca to i32
+ %alloca = alloca [2 x i32], align 4, addrspace(5)
+ %ptrtoint = ptrtoint [2 x i32] addrspace(5)* %alloca to i32
%mul = mul i32 %ptrtoint, 9
store volatile i32 %mul, i32 addrspace(3)* undef
ret void
@@ -74,16 +74,16 @@
; GCN-LABEL: {{^}}func_store_private_arg_i32_ptr:
; GCN: v_mov_b32_e32 v1, 15{{$}}
; GCN: buffer_store_dword v1, v0, s[0:3], s4 offen{{$}}
-define void @func_store_private_arg_i32_ptr(i32* %ptr) #0 {
- store volatile i32 15, i32* %ptr
+define void @func_store_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 {
+ store volatile i32 15, i32 addrspace(5)* %ptr
ret void
}
; GCN-LABEL: {{^}}func_load_private_arg_i32_ptr:
; GCN: s_waitcnt
; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], s4 offen{{$}}
-define void @func_load_private_arg_i32_ptr(i32* %ptr) #0 {
- %val = load volatile i32, i32* %ptr
+define void @func_load_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 {
+ %val = load volatile i32, i32 addrspace(5)* %ptr
ret void
}
@@ -102,11 +102,11 @@
; GCN-NOT: v_mov
; GCN: ds_write_b32 v0, v0
-define void @void_func_byval_struct_i8_i32_ptr({ i8, i32 }* byval %arg0) #0 {
- %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0
- %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1
- %load1 = load i32, i32* %gep1
- store volatile i32* %gep1, i32* addrspace(3)* undef
+define void @void_func_byval_struct_i8_i32_ptr({ i8, i32 } addrspace(5)* byval %arg0) #0 {
+ %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
+ %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
+ %load1 = load i32, i32 addrspace(5)* %gep1
+ store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
ret void
}
@@ -115,11 +115,11 @@
; GCN-NEXT: s_mov_b32 s5, s32
; GCN-NEXT: buffer_load_ubyte v0, off, s[0:3], s5
; GCN_NEXT: buffer_load_dword v1, off, s[0:3], s5 offset:4
-define void @void_func_byval_struct_i8_i32_ptr_value({ i8, i32 }* byval %arg0) #0 {
- %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0
- %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1
- %load0 = load i8, i8* %gep0
- %load1 = load i32, i32* %gep1
+define void @void_func_byval_struct_i8_i32_ptr_value({ i8, i32 } addrspace(5)* byval %arg0) #0 {
+ %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
+ %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
+ %load0 = load i8, i8 addrspace(5)* %gep0
+ %load1 = load i32, i32 addrspace(5)* %gep1
store volatile i8 %load0, i8 addrspace(3)* undef
store volatile i32 %load1, i32 addrspace(3)* undef
ret void
@@ -146,15 +146,15 @@
; GFX9: buffer_load_dword v1, v{{[0-9]+}}, s[0:3], s4 offen offset:4{{$}}
; GCN: ds_write_b32
-define void @void_func_byval_struct_i8_i32_ptr_nonentry_block({ i8, i32 }* byval %arg0, i32 %arg2) #0 {
+define void @void_func_byval_struct_i8_i32_ptr_nonentry_block({ i8, i32 } addrspace(5)* byval %arg0, i32 %arg2) #0 {
%cmp = icmp eq i32 %arg2, 0
br i1 %cmp, label %bb, label %ret
bb:
- %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0
- %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1
- %load1 = load volatile i32, i32* %gep1
- store volatile i32* %gep1, i32* addrspace(3)* undef
+ %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
+ %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
+ %load1 = load volatile i32, i32 addrspace(5)* %gep1
+ store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
br label %ret
ret:
@@ -175,12 +175,12 @@
; GCN: v_mul_lo_i32 v0, v0, 9
; GCN: ds_write_b32 v0, v0
define void @func_other_fi_user_non_inline_imm_offset_i32() #0 {
- %alloca0 = alloca [128 x i32], align 4
- %alloca1 = alloca [8 x i32], align 4
- %gep0 = getelementptr inbounds [128 x i32], [128 x i32]* %alloca0, i32 0, i32 65
- %gep1 = getelementptr inbounds [8 x i32], [8 x i32]* %alloca1, i32 0, i32 0
- store volatile i32 7, i32* %gep0
- %ptrtoint = ptrtoint i32* %gep1 to i32
+ %alloca0 = alloca [128 x i32], align 4, addrspace(5)
+ %alloca1 = alloca [8 x i32], align 4, addrspace(5)
+ %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65
+ %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0
+ store volatile i32 7, i32 addrspace(5)* %gep0
+ %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32
%mul = mul i32 %ptrtoint, 9
store volatile i32 %mul, i32 addrspace(3)* undef
ret void
@@ -199,20 +199,20 @@
; GCN: v_mul_lo_i32 v0, v0, 9
; GCN: ds_write_b32 v0, v0
define void @func_other_fi_user_non_inline_imm_offset_i32_vcc_live() #0 {
- %alloca0 = alloca [128 x i32], align 4
- %alloca1 = alloca [8 x i32], align 4
+ %alloca0 = alloca [128 x i32], align 4, addrspace(5)
+ %alloca1 = alloca [8 x i32], align 4, addrspace(5)
%vcc = call i64 asm sideeffect "; def $0", "={VCC}"()
- %gep0 = getelementptr inbounds [128 x i32], [128 x i32]* %alloca0, i32 0, i32 65
- %gep1 = getelementptr inbounds [8 x i32], [8 x i32]* %alloca1, i32 0, i32 0
- store volatile i32 7, i32* %gep0
+ %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65
+ %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0
+ store volatile i32 7, i32 addrspace(5)* %gep0
call void asm sideeffect "; use $0", "{VCC}"(i64 %vcc)
- %ptrtoint = ptrtoint i32* %gep1 to i32
+ %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32
%mul = mul i32 %ptrtoint, 9
store volatile i32 %mul, i32 addrspace(3)* undef
ret void
}
-declare void @func(<4 x float>* nocapture) #0
+declare void @func(<4 x float> addrspace(5)* nocapture) #0
; undef flag not preserved in eliminateFrameIndex when handling the
; stores in the middle block.
@@ -225,16 +225,16 @@
; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s5 offset:
define void @undefined_stack_store_reg(float %arg, i32 %arg1) #0 {
bb:
- %tmp = alloca <4 x float>, align 16
+ %tmp = alloca <4 x float>, align 16, addrspace(5)
%tmp2 = insertelement <4 x float> undef, float %arg, i32 0
- store <4 x float> %tmp2, <4 x float>* undef
+ store <4 x float> %tmp2, <4 x float> addrspace(5)* undef
%tmp3 = icmp eq i32 %arg1, 0
br i1 %tmp3, label %bb4, label %bb5
bb4:
- call void @func(<4 x float>* nonnull undef)
- store <4 x float> %tmp2, <4 x float>* %tmp, align 16
- call void @func(<4 x float>* nonnull %tmp)
+ call void @func(<4 x float> addrspace(5)* nonnull undef)
+ store <4 x float> %tmp2, <4 x float> addrspace(5)* %tmp, align 16
+ call void @func(<4 x float> addrspace(5)* nonnull %tmp)
br label %bb5
bb5:
@@ -245,15 +245,15 @@
; GCN: s_and_saveexec_b64
; GCN: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s5 offset:12
define void @alloca_ptr_nonentry_block(i32 %arg0) #0 {
- %alloca0 = alloca { i8, i32 }, align 4
+ %alloca0 = alloca { i8, i32 }, align 4, addrspace(5)
%cmp = icmp eq i32 %arg0, 0
br i1 %cmp, label %bb, label %ret
bb:
- %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %alloca0, i32 0, i32 0
- %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %alloca0, i32 0, i32 1
- %load1 = load volatile i32, i32* %gep1
- store volatile i32* %gep1, i32* addrspace(3)* undef
+ %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 0
+ %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 1
+ %load1 = load volatile i32, i32 addrspace(5)* %gep1
+ store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
br label %ret
ret: