2bc3d4d46c5f19d8433fd088fa95d18f9707bde8 - toolchain/llvm-project

commit	2bc3d4d46c5f19d8433fd088fa95d18f9707bde8	[log] [tgz]
author	Michael Kuperstein <mkuper@google.com>	Thu Aug 18 20:08:15 2016 +0000
committer	Michael Kuperstein <mkuper@google.com>	Thu Aug 18 20:08:15 2016 +0000
tree	1bf251351a4472649c63fb3f1bc7f2f056386f1f
parent	dea5ccb04b8be312456a5bdb6483cfb0fcb5b962 [diff]

[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround

The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597

llvm-svn: 279129

llvm/include/llvm/Target/TargetSelectionDAG.td[diff]
llvm/lib/Target/AArch64/AArch64InstrFormats.td[diff]
llvm/lib/Target/AArch64/AArch64InstrInfo.td[diff]
llvm/lib/Target/AMDGPU/SIInstructions.td[diff]
llvm/lib/Target/ARM/ARMInstrVFP.td[diff]
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp[diff]
llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td[diff]
llvm/lib/Target/Mips/MipsInstrFPU.td[diff]
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp[diff]
llvm/lib/Target/NVPTX/NVPTXInstrInfo.td[diff]
llvm/lib/Target/PowerPC/PPCInstrInfo.td[diff]
llvm/lib/Target/PowerPC/PPCInstrQPX.td[diff]
llvm/lib/Target/PowerPC/PPCInstrVSX.td[diff]
llvm/lib/Target/Sparc/SparcISelLowering.cpp[diff]
llvm/lib/Target/Sparc/SparcInstrInfo.td[diff]
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp[diff]
llvm/lib/Target/SystemZ/SystemZInstrFP.td[diff]
llvm/lib/Target/SystemZ/SystemZInstrVector.td[diff]
llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td[diff]
llvm/lib/Target/X86/X86InstrAVX512.td[diff]
llvm/lib/Target/X86/X86InstrFPStack.td[diff]
llvm/lib/Target/X86/X86InstrSSE.td[diff]

22 files changed

tree: 1bf251351a4472649c63fb3f1bc7f2f056386f1f

clang/
clang-tools-extra/
compiler-rt/
debuginfo-tests/
libclc/
libcxx/
libcxxabi/
libunwind/
lld/
lldb/
llgo/
llvm/
openmp/
parallel-libs/
polly/