[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.
Differential Revision: https://reviews.llvm.org/D23597
llvm-svn: 279129
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td
index 931f4a9..b65a124 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td
@@ -89,10 +89,10 @@
"f64.convert_u/i64\t$dst, $src">;
def F64_PROMOTE_F32 : I<(outs F64:$dst), (ins F32:$src),
- [(set F64:$dst, (fextend F32:$src))],
+ [(set F64:$dst, (fpextend F32:$src))],
"f64.promote/f32\t$dst, $src">;
def F32_DEMOTE_F64 : I<(outs F32:$dst), (ins F64:$src),
- [(set F32:$dst, (fround F64:$src))],
+ [(set F32:$dst, (fpround F64:$src))],
"f32.demote/f64\t$dst, $src">;
def I32_REINTERPRET_F32 : I<(outs I32:$dst), (ins F32:$src),