[SystemZ] Implement conditional returns
Return is now considered a predicable instruction, and is converted
to a newly-added CondReturn (which maps to BCR to %r14) instruction by
the if conversion pass.
Also, fused compare-and-branch transform knows about conditional
returns, emitting the proper fused instructions for them.
This transform triggers on a *lot* of tests, hence the huge diffstat.
The changes are mostly jX to br %r14 -> bXr %r14.
Author: koriakin
Differential Revision: http://reviews.llvm.org/D17339
llvm-svn: 265689
diff --git a/llvm/test/CodeGen/SystemZ/int-cmp-44.ll b/llvm/test/CodeGen/SystemZ/int-cmp-44.ll
index a87dccd..1b9a4ae 100644
--- a/llvm/test/CodeGen/SystemZ/int-cmp-44.ll
+++ b/llvm/test/CodeGen/SystemZ/int-cmp-44.ll
@@ -11,7 +11,7 @@
define i32 @f1(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f1:
; CHECK: afi %r2, 1000000
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -30,7 +30,7 @@
define i32 @f2(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f2:
; CHECK: afi %r2, 1000000
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -49,7 +49,7 @@
define i32 @f3(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f3:
; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijl %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibl %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -68,7 +68,7 @@
define i32 @f4(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f4:
; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijle %r2, 0, .L{{.*}}
+; CHECK-NEXT: cible %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -87,7 +87,7 @@
define i32 @f5(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f5:
; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijh %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibh %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -106,7 +106,7 @@
define i32 @f6(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f6:
; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijhe %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibhe %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -125,7 +125,7 @@
define i32 @f7(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f7:
; CHECK: s %r2, 0(%r4)
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
; CHECK: br %r14
entry:
%cur = load i32 , i32 *%dest
@@ -145,7 +145,7 @@
define i32 @f8(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f8:
; CHECK: s %r2, 0(%r4)
-; CHECK-NEXT: cijl %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibl %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%cur = load i32 , i32 *%dest
@@ -166,7 +166,7 @@
define i32 @f9(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f9:
; CHECK: nr %r2, %r3
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%res = and i32 %a, %b
@@ -185,7 +185,7 @@
define i32 @f10(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f10:
; CHECK: nr %r2, %r3
-; CHECK-NEXT: cijl %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibl %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%res = and i32 %a, %b
@@ -205,7 +205,7 @@
define i32 @f11(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f11:
; CHECK: nilf %r2, 100000001
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%res = and i32 %a, 100000001
@@ -225,7 +225,7 @@
define i32 @f12(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f12:
; CHECK: nill %r2, 65436
-; CHECK-NEXT: cijlh %r2, 0, .L{{.*}}
+; CHECK-NEXT: ciblh %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%res = and i32 %a, -100
@@ -244,7 +244,7 @@
define i32 @f13(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f13:
; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
; CHECK: br %r14
entry:
%res = ashr i32 %a, %b
@@ -263,7 +263,7 @@
define i32 @f14(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f14:
; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jlh .L{{.*}}
+; CHECK-NEXT: blhr %r14
; CHECK: br %r14
entry:
%res = ashr i32 %a, %b
@@ -282,7 +282,7 @@
define i32 @f15(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f15:
; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%res = ashr i32 %a, %b
@@ -301,7 +301,7 @@
define i32 @f16(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f16:
; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
; CHECK: br %r14
entry:
%res = ashr i32 %a, %b
@@ -320,7 +320,7 @@
define i32 @f17(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f17:
; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%res = ashr i32 %a, %b
@@ -339,7 +339,7 @@
define i32 @f18(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f18:
; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jhe .L{{.*}}
+; CHECK-NEXT: bher %r14
; CHECK: br %r14
entry:
%res = ashr i32 %a, %b
@@ -359,7 +359,7 @@
define i64 @f19(i64 %a, i64 %b, i64 *%dest) {
; CHECK-LABEL: f19:
; CHECK: risbg %r2, %r3, 0, 190, 0
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
; CHECK: br %r14
entry:
%res = and i64 %b, -2
@@ -378,7 +378,7 @@
define i64 @f20(i64 %a, i64 %b, i64 *%dest) {
; CHECK-LABEL: f20:
; CHECK: risbg %r2, %r3, 0, 190, 0
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%res = and i64 %b, -2
@@ -401,7 +401,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: cije %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibe %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%add = add i32 %a, 1000000
@@ -424,7 +424,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: cije %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibe %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%add = add i32 %a, 1000000
@@ -445,7 +445,7 @@
; CHECK-LABEL: f23:
; CHECK: afi %r2, 1000000
; CHECK-NEXT: st %r2, 0(%r4)
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
; CHECK: br %r14
entry:
%res = add i32 %a, 1000000
@@ -491,7 +491,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
; CHECK: br %r14
entry:
%add = add i32 %a, 1000000
@@ -514,7 +514,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: cijlh %r2, 0, .L{{.*}}
+; CHECK-NEXT: ciblh %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%add = add i32 %a, 1000000
@@ -537,7 +537,7 @@
; CHECK: afi %r2, 1000000
; CHECK-NEXT: sr %r3, %r2
; CHECK-NEXT: st %r3, 0(%r4)
-; CHECK-NEXT: cije %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibe %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%add = add i32 %a, 1000000
@@ -558,7 +558,7 @@
define void @f28(i64 %a, i64 *%dest) {
; CHECK-LABEL: f28:
; CHECK: xi 0(%r2), 15
-; CHECK: cgije %r2, 0, .L{{.*}}
+; CHECK: cgibe %r2, 0, 0(%r14)
; CHECK: br %r14
entry:
%ptr = inttoptr i64 %a to i8 *
@@ -580,7 +580,7 @@
define i32 @f29(i64 %base, i64 %index, i32 *%dest) {
; CHECK-LABEL: f29:
; CHECK: lt %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
; CHECK: br %r14
entry:
%add = add i64 %base, %index
@@ -601,7 +601,7 @@
define i32 @f30(i64 %base, i64 %index, i32 *%dest) {
; CHECK-LABEL: f30:
; CHECK: lt %r2, 100000({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
; CHECK: br %r14
entry:
%add1 = add i64 %base, %index
@@ -623,7 +623,7 @@
define i64 @f31(i64 %base, i64 %index, i64 *%dest) {
; CHECK-LABEL: f31:
; CHECK: ltg %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jhe .L{{.*}}
+; CHECK-NEXT: bher %r14
; CHECK: br %r14
entry:
%add = add i64 %base, %index
@@ -644,7 +644,7 @@
define i64 @f32(i64 %base, i64 %index, i64 *%dest) {
; CHECK-LABEL: f32:
; CHECK: ltgf %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%add = add i64 %base, %index
@@ -669,7 +669,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
call void asm sideeffect "blah $0", "{r2}"(i32 %val)
@@ -691,7 +691,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
call void asm sideeffect "blah $0", "{r2}"(i64 %val)
@@ -713,7 +713,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%ext = sext i32 %val to i64
@@ -737,7 +737,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r3
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
call void asm sideeffect "blah $0", "{r3}"(i32 %val)
@@ -760,7 +760,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r3
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
call void asm sideeffect "blah $0", "{r3}"(i64 %val)
@@ -783,7 +783,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r3
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%ext = sext i32 %val to i64
@@ -806,7 +806,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%val = trunc i64 %a to i32
@@ -830,7 +830,7 @@
; CHECK-NEXT: #APP
; CHECK-NEXT: blah %r2
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%shl = shl i64 %a, 32
@@ -851,7 +851,7 @@
define i32 @f41(i32 %a, i32 %b, i32 *%dest) {
; CHECK-LABEL: f41:
; CHECK: s %r2, 0(%r4)
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
; CHECK: br %r14
entry:
%cur = load i32 , i32 *%dest
@@ -871,7 +871,7 @@
define i64 @f42(i64 %base, i64 %index, i64 *%dest) {
; CHECK-LABEL: f42:
; CHECK: ltgf %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%add = add i64 %base, %index