commit 2ed540779d9fdfc4f4f2b3780b1f631c68b479a3
author Craig Topper <craig.topper@intel.com> Sat Mar 24 22:58:03 2018 +0000
committer Craig Topper <craig.topper@intel.com> Sat Mar 24 22:58:03 2018 +0000
tree 35c37bb726885df1d82244189dfd7bcc5f6bb30a
parent 18cfa2c710403bd6380e51d39ca7771854b9ea6d

[SchedModel] Remove an unneeded temporary vector.

llvm-svn: 328442

llvm/utils/TableGen/CodeGenSchedule.cpp

diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 9c38129..9f9b32b 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1357,12 +1357,11 @@
               [&SchedModels](ArrayRef<unsigned> RS) {
                 return SchedModels.findOrInsertRW(RS, /*IsRead=*/true);
               });
-    IdxVec ProcIndices(I->ProcIndices.begin(), I->ProcIndices.end());
     CodeGenSchedTransition SCTrans;
     SCTrans.ToClassIdx =
       SchedModels.addSchedClass(/*ItinClassDef=*/nullptr, OperWritesVariant,
-                                OperReadsVariant, ProcIndices);
-    SCTrans.ProcIndices = ProcIndices;
+                                OperReadsVariant, I->ProcIndices);
+    SCTrans.ProcIndices.assign(I->ProcIndices.begin(), I->ProcIndices.end());
     // The final PredTerm is unique set of predicates guarding the transition.
     RecVec Preds;
     transform(I->PredTerm, std::back_inserter(Preds),