| commit | 304f349770843defedf882545cdfa078cf94c20c | [log] [tgz] |
|---|---|---|
| author | Yaxun Liu <Yaxun.Liu@amd.com> | Thu Sep 28 19:07:59 2017 +0000 |
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | Thu Sep 28 19:07:59 2017 +0000 |
| tree | 1e1a679b92d6695eb4c36599f3208b42bdb6d31c | |
| parent | d6218cc385920a462a99d28e0959c7300b25468a [diff] |
[AMDGPU] Allow flexible register names in inline asm constraints
Currently AMDGPU inline asm only allow v and s as register names in constraints.
This patch allows the following register names in constraints: (n, m is unsigned integer, n < m)
v
s
{vn} or {v[n]}
{sn} or {s[n]}
{S} , where S is a special register name
{v[n:m]}
{s[n:m]}
Differential Revision: https://reviews.llvm.org/D37568
llvm-svn: 314452