| commit | 320f79c8aa1066b0f46b84eb1564fcf705da5922 | [log] [tgz] |
|---|---|---|
| author | Daniel Sanders <daniel_l_sanders@apple.com> | Fri Feb 03 14:18:35 2017 +0000 |
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | Fri Feb 03 14:18:35 2017 +0000 |
| tree | 852e30f53ac0d08aff50efafa1d5463e5be99204 | |
| parent | 4524268c02d076266ead0d05708ab4460a73ac0f [diff] [blame] |
[globalisel] Fix missing break. The instruction selector has been emitting the register bank information too. llvm-svn: 294007
diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp index c9a818e..6937f20 100644 --- a/llvm/utils/TableGen/TableGen.cpp +++ b/llvm/utils/TableGen/TableGen.cpp
@@ -185,6 +185,7 @@ break; case GenGlobalISel: EmitGlobalISel(Records, OS); + break; case GenRegisterBank: EmitRegisterBank(Records, OS); break;