commit 323dbe57a6578a6f3456a062878d337cf657a1da
author Devang Patel <dpatel@apple.com> Tue Dec 23 21:55:04 2008 +0000
committer Devang Patel <dpatel@apple.com> Tue Dec 23 21:55:04 2008 +0000
tree fa982b20c2c81e20abd11e935679d293c37d27e9
parent 12f2490489c884cd729ad3ac4f8f5583213b4682

Silience unused warnings.

llvm-svn: 61390

llvm/lib/CodeGen/RegAllocSimple.cpp

diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp
index 7dc9890..5e5290c 100644
--- a/llvm/lib/CodeGen/RegAllocSimple.cpp
+++ b/llvm/lib/CodeGen/RegAllocSimple.cpp
@@ -122,7 +122,9 @@
 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtualReg);
   TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
+#ifndef NDEBUG
   TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
+#endif
 
   while (1) {
     unsigned regIdx = RegClassIdx[RC]++;