commit 32be2dc0afb6e91ea5af8bac112b89ea29504647
author Evan Cheng <evan.cheng@apple.com> Tue Jan 31 22:23:14 2006 +0000
committer Evan Cheng <evan.cheng@apple.com> Tue Jan 31 22:23:14 2006 +0000
tree 8af26880214e2f9a5778418680e5a7463a5e2b5f
parent c642aa5e1cb5262d7fb26f434b6dfac15a2caaad

Allow the specification of explicit alignments for constant pool entries.

llvm-svn: 25855

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 8b5546d..28beeaf 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -389,8 +389,9 @@
     return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, OutLo, OutHi);
   }
   case ISD::ConstantPool: {
-    Constant *C = cast<ConstantPoolSDNode>(Op)->get();
-    SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i32);
+    ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
+    Constant *C = CP->get();
+    SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i32, CP->getAlignment());
     SDOperand Zero = DAG.getConstant(0, MVT::i32);
     
     if (PPCGenerateStaticCode) {