commit 34586e7d4147e0074e244e8db18f550ecc2079e3
author Elena Demikhovsky <elena.demikhovsky@intel.com> Wed Oct 02 12:20:42 2013 +0000
committer Elena Demikhovsky <elena.demikhovsky@intel.com> Wed Oct 02 12:20:42 2013 +0000
tree 03f3a22b3c7b589354ab9c33b624946c1d5e8282
parent 375d6c1ee033e8ce69fec9a9069cd80aa49a8f3a

AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 target

llvm-svn: 191818

llvm/lib/Target/X86/X86InstrInfo.cpp

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 80d681a..6216627 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -3104,14 +3104,11 @@
     if (X86::VK8RegClass.hasSubClassEq(RC)  || 
       X86::VK16RegClass.hasSubClassEq(RC))
       return load ? X86::KMOVWkm : X86::KMOVWmk;
-
-    if (X86::FR32XRegClass.hasSubClassEq(RC))
+    if (RC->getSize() == 4 && X86::FR32XRegClass.hasSubClassEq(RC))
       return load ? X86::VMOVSSZrm : X86::VMOVSSZmr;
-    if (X86::FR64XRegClass.hasSubClassEq(RC))
+    if (RC->getSize() == 8 && X86::FR64XRegClass.hasSubClassEq(RC))
       return load ? X86::VMOVSDZrm : X86::VMOVSDZmr;
-    if (X86::VR128XRegClass.hasSubClassEq(RC) ||
-        X86::VR256XRegClass.hasSubClassEq(RC) ||
-        X86::VR512RegClass.hasSubClassEq(RC))
+    if (X86::VR512RegClass.hasSubClassEq(RC))
       return load ? X86::VMOVUPSZrm : X86::VMOVUPSZmr;
   }