commit 3494b7ee426bef722baf0b28d19ca82e951b05f7
author Tom Stellard <thomas.stellard@amd.com> Wed Aug 14 22:22:14 2013 +0000
committer Tom Stellard <thomas.stellard@amd.com> Wed Aug 14 22:22:14 2013 +0000
tree bbcd1c2163c4560e56222deab04ad08e47967b93
parent 20ee94f152f9e6c21982d58ec1f22ef92f5e3a51

R600/SI: Handle MSAA texture targets

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
llvm-svn: 188421

llvm/lib/Target/R600/R600Instructions.td

diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td
index 7e61b18..52205cc 100644
--- a/llvm/lib/Target/R600/R600Instructions.td
+++ b/llvm/lib/Target/R600/R600Instructions.td
@@ -230,7 +230,7 @@
 def TEX_ARRAY : PatLeaf<
   (imm),
   [{uint32_t TType = (uint32_t)N->getZExtValue();
-    return TType == 9 || TType == 10 || TType == 15 || TType == 16;
+    return TType == 9 || TType == 10 || TType == 16;
   }]
 >;
 
@@ -241,6 +241,20 @@
   }]
 >;
 
+def TEX_MSAA : PatLeaf<
+  (imm),
+  [{uint32_t TType = (uint32_t)N->getZExtValue();
+    return TType == 14;
+  }]
+>;
+
+def TEX_ARRAY_MSAA : PatLeaf<
+  (imm),
+  [{uint32_t TType = (uint32_t)N->getZExtValue();
+    return TType == 15;
+  }]
+>;
+
 class EG_CF_RAT <bits <8> cfinst, bits <6> ratinst, bits<4> mask, dag outs,
                  dag ins, string asm, list<dag> pattern> :
     InstR600ISA <outs, ins, asm, pattern>,