Update branch coalescing to be a PowerPC specific pass
Implementing this pass as a PowerPC specific pass. Branch coalescing utilizes
the analyzeBranch method which currently does not include any implicit operands.
This is not an issue on PPC but must be handled on other targets.
Pass is currently off by default. Enabled via -enable-ppc-branch-coalesce.
Differential Revision : https: // reviews.llvm.org/D32776
llvm-svn: 313061
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index bc5d32b..9e14678 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -40,6 +40,10 @@
using namespace llvm;
+
+static cl::opt<bool>
+ EnableBranchCoalescing("enable-ppc-branch-coalesce", cl::Hidden,
+ cl::desc("enable coalescing of duplicate branches for PPC"));
static cl::
opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
cl::desc("Disable CTR loops for PPC"));
@@ -378,6 +382,10 @@
}
void PPCPassConfig::addMachineSSAOptimization() {
+ // PPCBranchCoalescingPass need to be done before machine sinking
+ // since it merges empty blocks.
+ if (EnableBranchCoalescing && getOptLevel() != CodeGenOpt::None)
+ addPass(createPPCBranchCoalescingPass());
TargetPassConfig::addMachineSSAOptimization();
// For little endian, remove where possible the vector swap instructions
// introduced at code generation to normalize vector element order.