| commit | 3657fe4b17226da36a0660e40cd03e9d36a5dea0 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@gmail.com> | Fri Oct 14 03:21:46 2011 +0000 |
| committer | Craig Topper <craig.topper@gmail.com> | Fri Oct 14 03:21:46 2011 +0000 |
| tree | 8c7ea92bf50467ade2fb43fcdbfe5427afb1318b | |
| parent | d9ea7c8c31705898fc6af0e4dd320c2aeff4f5d9 [diff] [blame] |
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. llvm-svn: 141939
diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp index c2f60be..7064dd0 100644 --- a/llvm/lib/Target/X86/X86Subtarget.cpp +++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -290,6 +290,7 @@ , HasRDRAND(false) , HasF16C(false) , HasLZCNT(false) + , HasBMI(false) , IsBTMemSlow(false) , IsUAMemFast(false) , HasVectorUAMem(false)