Revert "[mips] Promote the result of SETCC nodes to GPR width."
This reverts commit r262316.
It seems that my change breaks an out-of-tree chromium buildbot, so
I'm reverting this in order to investigate the situation further.
llvm-svn: 262387
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll b/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
index c4632fb..87f2ca4 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
@@ -29,7 +29,8 @@
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=SEL -check-prefix=SEL-64
-define signext i1 @tst_select_i1_i1(i1 %s, i1 signext %x, i1 signext %y) {
+define signext i1 @tst_select_i1_i1(i1 signext %s,
+ i1 signext %x, i1 signext %y) {
entry:
; ALL-LABEL: tst_select_i1_i1:
@@ -53,7 +54,8 @@
ret i1 %r
}
-define signext i8 @tst_select_i1_i8(i1 %s, i8 signext %x, i8 signext %y) {
+define signext i8 @tst_select_i1_i8(i1 signext %s,
+ i8 signext %x, i8 signext %y) {
entry:
; ALL-LABEL: tst_select_i1_i8:
@@ -77,7 +79,8 @@
ret i8 %r
}
-define signext i32 @tst_select_i1_i32(i1 %s, i32 signext %x, i32 signext %y) {
+define signext i32 @tst_select_i1_i32(i1 signext %s,
+ i32 signext %x, i32 signext %y) {
entry:
; ALL-LABEL: tst_select_i1_i32:
@@ -101,7 +104,8 @@
ret i32 %r
}
-define signext i64 @tst_select_i1_i64(i1 %s, i64 signext %x, i64 signext %y) {
+define signext i64 @tst_select_i1_i64(i1 signext %s,
+ i64 signext %x, i64 signext %y) {
entry:
; ALL-LABEL: tst_select_i1_i64:
@@ -148,6 +152,8 @@
; CMOV-64: move $2, $6
; SEL-64: andi $[[T0:[0-9]+]], $4, 1
+ ; FIXME: This shift is redundant
+ ; SEL-64: sll $[[T0]], $[[T0]], 0
; SEL-64: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
; SEL-64: selnez $[[T0]], $5, $[[T0]]
; SEL-64: or $2, $[[T0]], $[[T1]]