[Hexagon] Preprocess mapped instructions before lowering to MC

llvm-svn: 255653
diff --git a/llvm/test/CodeGen/Hexagon/bit-eval.ll b/llvm/test/CodeGen/Hexagon/bit-eval.ll
index be886aa..1d2be5b 100644
--- a/llvm/test/CodeGen/Hexagon/bit-eval.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-eval.ll
@@ -20,7 +20,7 @@
 }
 
 ; CHECK-LABEL: test3:
-; CHECK: r1:0 = #1
+; CHECK: r1:0 = combine(#0, #1)
 define i64 @test3() #0 {
 entry:
   %0 = tail call i64 @llvm.hexagon.S4.extractp(i64 -1, i32 63, i32 63)