Support to provide exception and selector registers.
llvm-svn: 34482
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
index 1674d44..12b299a 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -548,8 +548,11 @@
return DAG.getNode(AlphaISD::GlobalRetAddr, MVT::i64);
//FIXME: implement
case ISD::FRAMEADDR: break;
+ // Exception address and exception selector. Currently unimplemented.
+ case ISD::EXCEPTIONADDR: break;
+ case ISD::EHSELECTION: break;
}
-
+
return SDOperand();
}