| commit | 37fefd68cc7a0960cd5c4067a26a6c8e5930439e | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Jun 10 02:18:02 2016 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Jun 10 02:18:02 2016 +0000 |
| tree | e18ba1b58b2f4b949b57b82b4cdb2a9aa6e1fce2 | |
| parent | a4a7220db1da747fdd231debe737cd7deb327ffe [diff] [blame] |
AMDGPU: Fix trailing whitespace llvm-svn: 272364
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index f96bb5e..e11de85 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -124,7 +124,7 @@ do { // ToDo: better to switch encoding length using some bit predicate // but it is unknown yet, so try all we can - + // Try to decode DPP and SDWA first to solve conflict with VOP1 and VOP2 // encodings if (Bytes.size() >= 8) {