commit 37fefd68cc7a0960cd5c4067a26a6c8e5930439e
author Matt Arsenault <Matthew.Arsenault@amd.com> Fri Jun 10 02:18:02 2016 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Fri Jun 10 02:18:02 2016 +0000
tree e18ba1b58b2f4b949b57b82b4cdb2a9aa6e1fce2
parent a4a7220db1da747fdd231debe737cd7deb327ffe

AMDGPU: Fix trailing whitespace

llvm-svn: 272364

llvm/lib/Target/AMDGPU/R600Schedule.td

diff --git a/llvm/lib/Target/AMDGPU/R600Schedule.td b/llvm/lib/Target/AMDGPU/R600Schedule.td
index df62bf8..70fb46c 100644
--- a/llvm/lib/Target/AMDGPU/R600Schedule.td
+++ b/llvm/lib/Target/AMDGPU/R600Schedule.td
@@ -9,7 +9,7 @@
 //
 // R600 has a VLIW architecture.  On pre-cayman cards there are 5 instruction
 // slots ALU.X, ALU.Y, ALU.Z, ALU.W, and TRANS.  For cayman cards, the TRANS
-// slot has been removed. 
+// slot has been removed.
 //
 //===----------------------------------------------------------------------===//