commit 383e72fcfebe5306a152efdab19ad5f532248ed4
author Matt Arsenault <Matthew.Arsenault@amd.com> Tue Jun 11 01:35:00 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Tue Jun 11 01:35:00 2019 +0000
tree 0dd84d7f67a96ffdf8ddd5ae7250a107ef4fd8fb
parent ef851f9e5b9bb67ead61cbc6d81552954ffef565

AMDGPU: Expand < 32-bit atomics

Also fix AtomicExpand asserting on atomicrmw fadd/fsub.

llvm-svn: 363021

llvm/lib/CodeGen/AtomicExpandPass.cpp

diff --git a/llvm/lib/CodeGen/AtomicExpandPass.cpp b/llvm/lib/CodeGen/AtomicExpandPass.cpp
index bb8b310..7aca67a 100644
--- a/llvm/lib/CodeGen/AtomicExpandPass.cpp
+++ b/llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -585,6 +585,10 @@
     unsigned MinCASSize = TLI->getMinCmpXchgSizeInBits() / 8;
     unsigned ValueSize = getAtomicOpSize(AI);
     if (ValueSize < MinCASSize) {
+      // TODO: Handle atomicrmw fadd/fsub
+      if (AI->getType()->isFloatingPointTy())
+        return false;
+
       expandPartwordAtomicRMW(AI,
                               TargetLoweringBase::AtomicExpansionKind::CmpXChg);
     } else {