commit 3ecf976ca9ffe435cd355e24dcd1e899a3dfc386
author Jim Grosbach <grosbach@apple.com> Wed Nov 30 18:21:25 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Wed Nov 30 18:21:25 2011 +0000
tree 81530806e4a750292f095e6a622022073ece0ebe
parent 11729f01f9a50ae59a054f062a3e18c89760a52e

ARM parsing for VLD1 two register all lanes, no writeback.

llvm-svn: 145504

llvm/utils/TableGen/EDEmitter.cpp

diff --git a/llvm/utils/TableGen/EDEmitter.cpp b/llvm/utils/TableGen/EDEmitter.cpp
index 04ee738..22de377 100644
--- a/llvm/utils/TableGen/EDEmitter.cpp
+++ b/llvm/utils/TableGen/EDEmitter.cpp
@@ -577,6 +577,7 @@
   REG("VecListFourD");
   REG("VecListTwoQ");
   REG("VecListOneDAllLanes");
+  REG("VecListTwoDAllLanes");
 
   IMM("i32imm");
   IMM("i32imm_hilo16");