commit 3ef4dd7bc88239070d52b62c6d598a9b3c7f7af8
author Hrvoje Varga <Hrvoje.Varga@imgtec.com> Thu Oct 15 08:11:50 2015 +0000
committer Hrvoje Varga <Hrvoje.Varga@imgtec.com> Thu Oct 15 08:11:50 2015 +0000
tree 5cd24e7465a8d849d06f4d7ef4e9b0308e694bdf
parent 736c741752316be98e1f608467b1bfe36c8af545

[mips][microMIPS] Implement LLE and SCE instructions
Differential Revision: http://reviews.llvm.org/D11630

llvm-svn: 250379

llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp

diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index 27eb399..79268e5 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -1411,6 +1411,9 @@
   Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
   Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
 
+  if (Inst.getOpcode() == Mips::SCE_MM)
+    Inst.addOperand(MCOperand::createReg(Reg));
+
   Inst.addOperand(MCOperand::createReg(Reg));
   Inst.addOperand(MCOperand::createReg(Base));
   Inst.addOperand(MCOperand::createImm(Offset));