[PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.
The VSX versions have the advantage of a full 64-register target whereas the FP
ones have the advantage of lower latency and higher throughput. So what we’re
after is using the faster instructions in low register pressure situations and
using the larger register file in high register pressure situations.
The heuristic chooses between the following 7 pairs of instructions.
PPC::LXSSPX vs PPC::LFSX
PPC::LXSDX vs PPC::LFDX
PPC::STXSSPX vs PPC::STFSX
PPC::STXSDX vs PPC::STFDX
PPC::LXSIWAX vs PPC::LFIWAX
PPC::LXSIWZX vs PPC::LFIWZX
PPC::STXSIWX vs PPC::STFIWX
Differential Revision: https://reviews.llvm.org/D38486
llvm-svn: 318651
diff --git a/llvm/lib/Target/PowerPC/P9InstrResources.td b/llvm/lib/Target/PowerPC/P9InstrResources.td
index 510352d..dc6ed16 100644
--- a/llvm/lib/Target/PowerPC/P9InstrResources.td
+++ b/llvm/lib/Target/PowerPC/P9InstrResources.td
@@ -711,7 +711,8 @@
LXV,
LXVX,
LXSD,
- DFLOADf64
+ DFLOADf64,
+ XFLOADf64
)>;
// 4 Cycle load uses a single slice.
@@ -751,7 +752,10 @@
LXSSPX,
LXSIWAX,
LXSSP,
- DFLOADf32
+ DFLOADf32,
+ XFLOADf32,
+ LIWAX,
+ LIWZX
)>;
// Cracked Load that requires the PM resource.
@@ -781,7 +785,10 @@
STXSSPX,
STXSIWX,
DFSTOREf32,
- DFSTOREf64
+ DFSTOREf64,
+ XFSTOREf32,
+ XFSTOREf64,
+ STIWX
)>;
// Store operation that requires the whole superslice.