Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html
In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.
llvm-svn: 323922
diff --git a/llvm/test/DebugInfo/ARM/PR16736.ll b/llvm/test/DebugInfo/ARM/PR16736.ll
index 65caba8..f5e090b 100644
--- a/llvm/test/DebugInfo/ARM/PR16736.ll
+++ b/llvm/test/DebugInfo/ARM/PR16736.ll
@@ -2,7 +2,7 @@
; RUN: llc -filetype=obj < %s \
; RUN: | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF
;
-; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}] [%r{{.*}}+0]
+; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}] [$r{{.*}}+0]
; DWARF: DW_TAG_formal_parameter
; DWARF: DW_AT_location
; DWARF-NEXT: DW_OP_reg0 R0
diff --git a/llvm/test/DebugInfo/ARM/sdag-split-arg.ll b/llvm/test/DebugInfo/ARM/sdag-split-arg.ll
index af16f95..c961f7d 100644
--- a/llvm/test/DebugInfo/ARM/sdag-split-arg.ll
+++ b/llvm/test/DebugInfo/ARM/sdag-split-arg.ll
@@ -19,8 +19,8 @@
; Function Attrs: optsize ssp
define i64 @_Z3foox(i64 returned) local_unnamed_addr #0 !dbg !13 {
tail call void @llvm.dbg.value(metadata i64 %0, metadata !17, metadata !DIExpression()), !dbg !18
- ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 0 32] %r5
- ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 32 32] %r4
+ ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 0 32] $r5
+ ; CHECK: @DEBUG_VALUE: foo:offset <- [DW_OP_LLVM_fragment 32 32] $r4
%2 = load i64, i64* @g, align 8, !dbg !19, !tbaa !21
%3 = icmp eq i64 %2, %0, !dbg !19
diff --git a/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll b/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll
index e6edcaa..e1424ba 100644
--- a/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll
+++ b/llvm/test/DebugInfo/ARM/sdag-split-arg1.ll
@@ -7,7 +7,7 @@
%0 = bitcast double %a to i64
%extract.t84 = trunc i64 %0 to i32
tail call void @llvm.dbg.value(metadata i32 %extract.t84, metadata !8, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !12
- ; CHECK: DBG_VALUE debug-use %r0, debug-use %noreg, !6, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+ ; CHECK: DBG_VALUE debug-use $r0, debug-use $noreg, !6, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
%r.sroa.0.0.insert.ext35 = zext i32 %extract.t84 to i64
ret i64 %r.sroa.0.0.insert.ext35
}
diff --git a/llvm/test/DebugInfo/COFF/fpo-csrs.ll b/llvm/test/DebugInfo/COFF/fpo-csrs.ll
index 92a0cc0..62e7bfc 100644
--- a/llvm/test/DebugInfo/COFF/fpo-csrs.ll
+++ b/llvm/test/DebugInfo/COFF/fpo-csrs.ll
@@ -65,7 +65,7 @@
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr1:a <- %esi
+; ASM: #DEBUG_VALUE: csr1:a <- $esi
; ASM: retl
; ASM: .cv_fpo_endproc
@@ -122,8 +122,8 @@
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr2:a <- %esi
-; ASM: #DEBUG_VALUE: csr2:b <- %edi
+; ASM: #DEBUG_VALUE: csr2:a <- $esi
+; ASM: #DEBUG_VALUE: csr2:b <- $edi
; ASM: retl
; ASM: .cv_fpo_endproc
@@ -192,9 +192,9 @@
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr3:a <- %esi
-; ASM: #DEBUG_VALUE: csr3:b <- %edi
-; ASM: #DEBUG_VALUE: csr3:c <- %ebx
+; ASM: #DEBUG_VALUE: csr3:a <- $esi
+; ASM: #DEBUG_VALUE: csr3:b <- $edi
+; ASM: #DEBUG_VALUE: csr3:c <- $ebx
; ASM: retl
; ASM: .cv_fpo_endproc
@@ -279,10 +279,10 @@
; ASM: pushl %esi
; ASM: .cv_fpo_pushreg %esi
; ASM: .cv_fpo_endprologue
-; ASM: #DEBUG_VALUE: csr4:a <- %esi
-; ASM: #DEBUG_VALUE: csr4:b <- %edi
-; ASM: #DEBUG_VALUE: csr4:c <- %ebx
-; ASM: #DEBUG_VALUE: csr4:d <- %ebp
+; ASM: #DEBUG_VALUE: csr4:a <- $esi
+; ASM: #DEBUG_VALUE: csr4:b <- $edi
+; ASM: #DEBUG_VALUE: csr4:c <- $ebx
+; ASM: #DEBUG_VALUE: csr4:d <- $ebp
; ASM: retl
; ASM: .cv_fpo_endproc
diff --git a/llvm/test/DebugInfo/COFF/local-variable-gap.ll b/llvm/test/DebugInfo/COFF/local-variable-gap.ll
index d6f1f85..7b75b55 100644
--- a/llvm/test/DebugInfo/COFF/local-variable-gap.ll
+++ b/llvm/test/DebugInfo/COFF/local-variable-gap.ll
@@ -33,13 +33,13 @@
; ASM: callq vardef
; ASM: movl %eax, %esi
; ASM: [[p_b1:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: p <- %esi
+; ASM: #DEBUG_VALUE: p <- $esi
; ASM: callq barrier
; ASM: movl %esi, %ecx
; ASM: testl %eax, %eax
; ASM: jne .LBB0_5
; ASM: # %bb.2: # %if.end
-; ASM: #DEBUG_VALUE: p <- %esi
+; ASM: #DEBUG_VALUE: p <- $esi
; ASM: callq use
; ASM: jmp .LBB0_4
; ASM: [[p_e1:\.Ltmp[0-9]+]]:
@@ -52,7 +52,7 @@
; ASM: retq
; ASM: .LBB0_5: # %if.then4
; ASM: [[p_b2:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: p <- %esi
+; ASM: #DEBUG_VALUE: p <- $esi
; ASM: callq call_noreturn
; ASM: ud2
; ASM: .Lfunc_end0:
diff --git a/llvm/test/DebugInfo/COFF/pieces.ll b/llvm/test/DebugInfo/COFF/pieces.ll
index 1297328..c35c12c 100644
--- a/llvm/test/DebugInfo/COFF/pieces.ll
+++ b/llvm/test/DebugInfo/COFF/pieces.ll
@@ -43,19 +43,19 @@
; ASM: .p2align 4, 0x90
; ASM: .LBB0_3: # %for.body
; ASM: [[ox_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] %edi
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
; ASM: .cv_loc 0 1 13 11 # t.c:13:11
; ASM: movl %edi, %ecx
; ASM: callq g
; ASM: movl %eax, %edi
; ASM: [[oy_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] %edi
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] %esi
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
; ASM: .cv_loc 0 1 14 11 # t.c:14:11
; ASM: movl %esi, %ecx
; ASM: callq g
; ASM: movl %eax, %esi
-; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] %esi
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
; ASM: cmpl n(%rip), %eax
; ASM: jl .LBB0_3
; ASM: [[oy_end:\.Ltmp[0-9]+]]:
@@ -64,23 +64,23 @@
; ASM-LABEL: pad_right: # @pad_right
-; ASM: #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] %ecx
+; ASM: #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] $ecx
; ASM: movl %ecx, %eax
; ASM: retq
; ASM-LABEL: pad_left: # @pad_left
-; ASM: #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] %ecx
+; ASM: #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] $ecx
; ASM: .cv_loc 2 1 24 3 # t.c:24:3
; ASM: movl %ecx, %eax
; ASM: retq
; ASM-LABEL: nested: # @nested
-; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] [%rcx+0]
+; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] [$rcx+0]
; ASM: movl 12(%rcx), %eax
; ASM: [[p_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] %eax
+; ASM: #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] $eax
; ASM: retq
; ASM-LABEL: bitpiece_spill: # @bitpiece_spill
@@ -89,7 +89,7 @@
; ASM: callq g
; ASM: movl %eax, [[offset_o_x:[0-9]+]](%rsp) # 4-byte Spill
; ASM: [[spill_o_x_start:\.Ltmp[0-9]+]]:
-; ASM: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_LLVM_fragment 32 32] [%rsp+0]
+; ASM: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offset_o_x]], DW_OP_LLVM_fragment 32 32] [$rsp+0]
; ASM: #APP
; ASM: #NO_APP
; ASM: movl [[offset_o_x]](%rsp), %eax # 4-byte Reload
diff --git a/llvm/test/DebugInfo/COFF/register-variables.ll b/llvm/test/DebugInfo/COFF/register-variables.ll
index 73cd2bc..b5671e3 100644
--- a/llvm/test/DebugInfo/COFF/register-variables.ll
+++ b/llvm/test/DebugInfo/COFF/register-variables.ll
@@ -26,30 +26,30 @@
; ASM: # %bb.0: # %entry
; ASM: pushq %rsi
; ASM: subq $32, %rsp
-; ASM: #DEBUG_VALUE: f:p <- %ecx
+; ASM: #DEBUG_VALUE: f:p <- $ecx
; ASM: movl %ecx, %esi
; ASM: [[p_ecx_esi:\.Ltmp.*]]:
-; ASM: #DEBUG_VALUE: f:p <- %esi
+; ASM: #DEBUG_VALUE: f:p <- $esi
; ASM: callq getint
; ASM: [[after_getint:\.Ltmp.*]]:
-; ASM: #DEBUG_VALUE: a <- %eax
-; ASM: #DEBUG_VALUE: inlineinc:a <- %eax
-; ASM: #DEBUG_VALUE: c <- %eax
+; ASM: #DEBUG_VALUE: a <- $eax
+; ASM: #DEBUG_VALUE: inlineinc:a <- $eax
+; ASM: #DEBUG_VALUE: c <- $eax
; ASM: testl %esi, %esi
; ASM: je .LBB0_2
; ASM: [[after_je:\.Ltmp.*]]:
; ASM: # %bb.1: # %if.then
-; ASM-DAG: #DEBUG_VALUE: inlineinc:a <- %eax
-; ASM-DAG: #DEBUG_VALUE: a <- %eax
-; ASM-DAG: #DEBUG_VALUE: f:p <- %esi
+; ASM-DAG: #DEBUG_VALUE: inlineinc:a <- $eax
+; ASM-DAG: #DEBUG_VALUE: a <- $eax
+; ASM-DAG: #DEBUG_VALUE: f:p <- $esi
; ASM: addl $1, %eax
; ASM: [[after_inc_eax:\.Ltmp.*]]:
-; ASM: #DEBUG_VALUE: inlineinc:b <- %eax
-; ASM: #DEBUG_VALUE: b <- %eax
+; ASM: #DEBUG_VALUE: inlineinc:b <- $eax
+; ASM: #DEBUG_VALUE: b <- $eax
; ASM: addl $1, x(%rip)
; ASM: [[after_if:\.Ltmp.*]]:
; ASM: .LBB0_2: # %if.else
-; ASM: #DEBUG_VALUE: f:p <- %esi
+; ASM: #DEBUG_VALUE: f:p <- $esi
; ASM: movl %eax, %ecx
; ASM: addq $32, %rsp
; ASM: popq %rsi
diff --git a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
index 3331ae5..7399147 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
@@ -112,12 +112,12 @@
selected: false
tracksRegLiveness: true
liveins:
- - { reg: '%w0' }
- - { reg: '%w1' }
- - { reg: '%d0' }
- - { reg: '%d1' }
- - { reg: '%d2' }
- - { reg: '%d3' }
+ - { reg: '$w0' }
+ - { reg: '$w1' }
+ - { reg: '$d0' }
+ - { reg: '$d1' }
+ - { reg: '$d2' }
+ - { reg: '$d3' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -135,39 +135,39 @@
stack:
- { id: 0, name: x.addr, offset: -20, size: 4, alignment: 4, local-offset: -4 }
- { id: 1, type: spill-slot, offset: -24, size: 4, alignment: 4 }
- - { id: 2, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '%lr' }
- - { id: 3, type: spill-slot, offset: -16, size: 8, alignment: 8, callee-saved-register: '%fp' }
+ - { id: 2, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '$lr' }
+ - { id: 3, type: spill-slot, offset: -16, size: 8, alignment: 8, callee-saved-register: '$fp' }
body: |
bb.0.entry:
successors: %bb.2.if.end(0x40000000), %bb.1.if.then(0x40000000)
- liveins: %w0, %w1, %d0, %d1, %d2, %d3, %lr
+ liveins: $w0, $w1, $d0, $d1, $d2, $d3, $lr
- %sp = frame-setup SUBXri %sp, 32, 0
- frame-setup STPXi killed %fp, killed %lr, %sp, 2 :: (store 8 into %stack.3), (store 8 into %stack.2)
- %fp = frame-setup ADDXri %sp, 16, 0
- DBG_VALUE debug-use %w0, debug-use _, !19, !22, debug-location !23
- STURWi killed %w0, %fp, -4 :: (store 4 into %stack.0.x.addr)
- DBG_VALUE debug-use %w1, debug-use _, !20, !22, debug-location !28
- STRWui killed %w1, %sp, 2, debug-location !30 :: (store 4 into %stack.1)
- DBG_VALUE %sp, 0, !20, !36, debug-location !28
- BL @g, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit killed %d0, implicit killed %d1, implicit killed %d2, implicit killed %d3, implicit-def %sp, debug-location !30
- %w0 = LDRWui %sp, 2, debug-location !33 :: (load 4 from %stack.1)
- CBZW killed %w0, %bb.2.if.end, debug-location !33
+ $sp = frame-setup SUBXri $sp, 32, 0
+ frame-setup STPXi killed $fp, killed $lr, $sp, 2 :: (store 8 into %stack.3), (store 8 into %stack.2)
+ $fp = frame-setup ADDXri $sp, 16, 0
+ DBG_VALUE debug-use $w0, debug-use _, !19, !22, debug-location !23
+ STURWi killed $w0, $fp, -4 :: (store 4 into %stack.0.x.addr)
+ DBG_VALUE debug-use $w1, debug-use _, !20, !22, debug-location !28
+ STRWui killed $w1, $sp, 2, debug-location !30 :: (store 4 into %stack.1)
+ DBG_VALUE $sp, 0, !20, !36, debug-location !28
+ BL @g, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $d0, implicit killed $d1, implicit killed $d2, implicit killed $d3, implicit-def $sp, debug-location !30
+ $w0 = LDRWui $sp, 2, debug-location !33 :: (load 4 from %stack.1)
+ CBZW killed $w0, %bb.2.if.end, debug-location !33
bb.1.if.then:
successors: %bb.2.if.end(0x80000000)
- DBG_VALUE debug-use %sp, 0, !20, !36, debug-location !28
- %x0 = SUBXri %fp, 4, 0
- DBG_VALUE debug-use %x0, debug-use _, !19, !22, debug-location !23
- BL @h, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit killed %x0, debug-location !34
+ DBG_VALUE debug-use $sp, 0, !20, !36, debug-location !28
+ $x0 = SUBXri $fp, 4, 0
+ DBG_VALUE debug-use $x0, debug-use _, !19, !22, debug-location !23
+ BL @h, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $x0, debug-location !34
bb.2.if.end:
- DBG_VALUE debug-use %sp, 0, !20, !36, debug-location !28
- %w8 = MOVZWi 0, 0
- %x0 = ORRXrs %xzr, undef %x8, 0, implicit killed %w8, debug-location !35
- %fp, %lr = LDPXi %sp, 2, debug-location !35 :: (load 8 from %stack.3), (load 8 from %stack.2)
- %sp = ADDXri %sp, 32, 0, debug-location !35
- RET undef %lr, implicit killed %w0, debug-location !35
+ DBG_VALUE debug-use $sp, 0, !20, !36, debug-location !28
+ $w8 = MOVZWi 0, 0
+ $x0 = ORRXrs $xzr, undef $x8, 0, implicit killed $w8, debug-location !35
+ $fp, $lr = LDPXi $sp, 2, debug-location !35 :: (load 8 from %stack.3), (load 8 from %stack.2)
+ $sp = ADDXri $sp, 32, 0, debug-location !35
+ RET undef $lr, implicit killed $w0, debug-location !35
...
diff --git a/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir b/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
index c4b5283..a18f942 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
@@ -152,7 +152,7 @@
tracksRegLiveness: true
registers:
liveins:
- - { reg: '%x0', virtual-reg: '' }
+ - { reg: '$x0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -179,71 +179,71 @@
callee-saved-register: '', local-offset: -32, di-variable: '', di-expression: '',
di-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
- callee-saved-register: '%lr', di-variable: '', di-expression: '',
+ callee-saved-register: '$lr', di-variable: '', di-expression: '',
di-location: '' }
constants:
body: |
bb.0.entry:
successors: %bb.3.sw.bb2(0x2aaaaaab), %bb.1.entry(0x55555555)
- liveins: %x0, %lr
+ liveins: $x0, $lr
- %sp = frame-setup SUBXri %sp, 48, 0
- frame-setup STRXui killed %lr, %sp, 4 :: (store 8 into %stack.2)
+ $sp = frame-setup SUBXri $sp, 48, 0
+ frame-setup STRXui killed $lr, $sp, 4 :: (store 8 into %stack.2)
frame-setup CFI_INSTRUCTION def_cfa_offset 48
- frame-setup CFI_INSTRUCTION offset %w30, -16
- %w8 = LDRSBWui %x0, 4 :: (load 1 from %ir.ap, align 4)
- CBZW %w8, %bb.3.sw.bb2
+ frame-setup CFI_INSTRUCTION offset $w30, -16
+ $w8 = LDRSBWui $x0, 4 :: (load 1 from %ir.ap, align 4)
+ CBZW $w8, %bb.3.sw.bb2
bb.1.entry:
successors: %bb.2._ZN1jILi6EN1a1fEE1mEj.exit(0x40000001), %bb.4(0x3fffffff)
- liveins: %w8, %x0
+ liveins: $w8, $x0
- dead %wzr = SUBSWri killed %w8, 1, 0, implicit-def %nzcv
- Bcc 1, %bb.4, implicit %nzcv
+ dead $wzr = SUBSWri killed $w8, 1, 0, implicit-def $nzcv
+ Bcc 1, %bb.4, implicit $nzcv
bb.2._ZN1jILi6EN1a1fEE1mEj.exit:
successors: %bb.5.sw.epilog(0x80000000)
- liveins: %x0
+ liveins: $x0
- %w2 = ORRWri %wzr, 0, implicit-def %x2
- %x3 = IMPLICIT_DEF debug-location !32
- %x1 = IMPLICIT_DEF
- STRXui %x2, %sp, 2 :: (store 8 into %ir.2)
+ $w2 = ORRWri $wzr, 0, implicit-def $x2
+ $x3 = IMPLICIT_DEF debug-location !32
+ $x1 = IMPLICIT_DEF
+ STRXui $x2, $sp, 2 :: (store 8 into %ir.2)
DBG_VALUE 0, 0, !18, !23, debug-location !24
- STRXui %x2, %sp, 0, debug-location !27 :: (store 8 into %ir.1)
- %w4 = ORRWri %wzr, 0, implicit-def %x4
+ STRXui $x2, $sp, 0, debug-location !27 :: (store 8 into %ir.1)
+ $w4 = ORRWri $wzr, 0, implicit-def $x4
B %bb.5.sw.epilog
bb.3.sw.bb2:
successors: %bb.5.sw.epilog(0x80000000)
- liveins: %x0
+ liveins: $x0
- %x4, %x3 = LDPXi %sp, 0 :: (dereferenceable load 8 from %ir.3), (dereferenceable load 8 from %ir..phi.trans.insert26)
- %x2, %x1 = LDPXi %sp, 2 :: (dereferenceable load 8 from %ir..phi.trans.insert), (dereferenceable load 8 from %ir.4)
+ $x4, $x3 = LDPXi $sp, 0 :: (dereferenceable load 8 from %ir.3), (dereferenceable load 8 from %ir..phi.trans.insert26)
+ $x2, $x1 = LDPXi $sp, 2 :: (dereferenceable load 8 from %ir..phi.trans.insert), (dereferenceable load 8 from %ir.4)
B %bb.5.sw.epilog
bb.4:
successors: %bb.5.sw.epilog(0x80000000)
- liveins: %x0
+ liveins: $x0
- %x2 = ORRXrs %xzr, %xzr, 0
- %x4 = ORRXrs %xzr, %xzr, 0
- %x3 = IMPLICIT_DEF debug-location !32
- %x1 = IMPLICIT_DEF
+ $x2 = ORRXrs $xzr, $xzr, 0
+ $x4 = ORRXrs $xzr, $xzr, 0
+ $x3 = IMPLICIT_DEF debug-location !32
+ $x1 = IMPLICIT_DEF
bb.5.sw.epilog:
- liveins: %x0, %x1, %x2, %x3, %x4
+ liveins: $x0, $x1, $x2, $x3, $x4
- %w8 = LDRBBui %x0, 5 :: (load 1 from %ir.bx)
- %w0 = LDRWui killed %x0, 0 :: (load 4 from %ir.bw1)
- %x7 = ADRP target-flags(aarch64-page) @bt
- %x7 = ADDXri killed %x7, target-flags(aarch64-pageoff, aarch64-nc) @bt, 0
- dead %wzr = SUBSWri killed %w8, 0, 0, implicit-def %nzcv
- %w5 = CSINCWr %wzr, %wzr, 0, implicit killed %nzcv
- %w6 = ORRWrs %wzr, %wzr, 0
- BL @_Z2byi1LS_bbPi, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit killed %w0, implicit killed %x1, implicit killed %x2, implicit killed %x3, implicit killed %x4, implicit killed %w5, implicit killed %w6, implicit killed %x7, implicit-def %sp
- %lr = LDRXui %sp, 4 :: (load 8 from %stack.2)
- %sp = ADDXri %sp, 48, 0
- RET undef %lr
+ $w8 = LDRBBui $x0, 5 :: (load 1 from %ir.bx)
+ $w0 = LDRWui killed $x0, 0 :: (load 4 from %ir.bw1)
+ $x7 = ADRP target-flags(aarch64-page) @bt
+ $x7 = ADDXri killed $x7, target-flags(aarch64-pageoff, aarch64-nc) @bt, 0
+ dead $wzr = SUBSWri killed $w8, 0, 0, implicit-def $nzcv
+ $w5 = CSINCWr $wzr, $wzr, 0, implicit killed $nzcv
+ $w6 = ORRWrs $wzr, $wzr, 0
+ BL @_Z2byi1LS_bbPi, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit killed $x1, implicit killed $x2, implicit killed $x3, implicit killed $x4, implicit killed $w5, implicit killed $w6, implicit killed $x7, implicit-def $sp
+ $lr = LDRXui $sp, 4 :: (load 8 from %stack.2)
+ $sp = ADDXri $sp, 48, 0
+ RET undef $lr
...
diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
index 7aa752e1..08c2bd0 100644
--- a/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
@@ -74,19 +74,19 @@
regBankSelected: false
selected: false
tracksRegLiveness: true
-calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13',
- '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4',
- '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16',
- '%s17', '%s18', '%s19', '%s20', '%s21', '%s22',
- '%s23', '%s24', '%s25', '%s26', '%s27', '%s28',
- '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12',
- '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6',
- '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11',
- '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13',
- '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12',
- '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15',
- '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10',
- '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ]
+calleeSavedRegisters: [ '$lr', '$d8', '$d9', '$d10', '$d11', '$d12', '$d13',
+ '$d14', '$d15', '$q4', '$q5', '$q6', '$q7', '$r4',
+ '$r5', '$r6', '$r7', '$r8', '$r10', '$r11', '$s16',
+ '$s17', '$s18', '$s19', '$s20', '$s21', '$s22',
+ '$s23', '$s24', '$s25', '$s26', '$s27', '$s28',
+ '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
+ '$d11_d13', '$d12_d14', '$d13_d15', '$q4_q5', '$q5_q6',
+ '$q6_q7', '$q4_q5_q6_q7', '$r4_r5', '$r6_r7', '$r10_r11',
+ '$d8_d9_d10', '$d9_d10_d11', '$d10_d11_d12', '$d11_d12_d13',
+ '$d12_d13_d14', '$d13_d14_d15', '$d8_d10_d12',
+ '$d9_d11_d13', '$d10_d12_d14', '$d11_d13_d15',
+ '$d8_d10_d12_d14', '$d9_d11_d13_d15', '$d9_d10',
+ '$d11_d12', '$d13_d14', '$d9_d10_d11_d12', '$d11_d12_d13_d14' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -102,22 +102,22 @@
hasVAStart: false
hasMustTailInVarArgFunc: false
stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' }
+ - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$lr' }
body: |
bb.0.entry:
- liveins: %lr
+ liveins: $lr
- early-clobber %sp = frame-setup t2STR_PRE killed undef %lr, %sp, -4, 14, _
+ early-clobber $sp = frame-setup t2STR_PRE killed undef $lr, $sp, -4, 14, _
frame-setup CFI_INSTRUCTION def_cfa_offset 4
- frame-setup CFI_INSTRUCTION offset %lr, -4
- tBL 14, _, @v, csr_ios, implicit-def dead %lr, implicit %sp, implicit-def %sp, implicit-def %r0, implicit-def %r1, implicit-def %r2, implicit-def %r3, debug-location !19
- %d1 = VMOVDRR killed %r2, killed %r3, 14, _, implicit-def %q0, debug-location !19
- %d0 = VMOVDRR killed %r0, killed %r1, 14, _, implicit killed %q0, implicit-def %q0, debug-location !19
- DBG_VALUE debug-use %q0, debug-use _, !14, !20, debug-location !21
- %s4 = VMOVS %s1, 14, _, implicit-def %d2, debug-location !24
- %d0 = VADDfd %d0, killed %d2, 14, _, implicit killed %q0, debug-location !24
- %r0 = VMOVRS %s0, 14, _, implicit killed %d0, debug-location !25
- %lr, %sp = t2LDR_POST %sp, 4, 14, _, debug-location !25
- tBX_RET 14, _, implicit %r0, debug-location !25
+ frame-setup CFI_INSTRUCTION offset $lr, -4
+ tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19
+ $d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19
+ $d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19
+ DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21
+ $s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24
+ $d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24
+ $r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25
+ $lr, $sp = t2LDR_POST $sp, 4, 14, _, debug-location !25
+ tBX_RET 14, _, implicit $r0, debug-location !25
...
diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
index ff1ea8e..5f78d93 100644
--- a/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
@@ -74,19 +74,19 @@
regBankSelected: false
selected: false
tracksRegLiveness: true
-calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13',
- '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4',
- '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16',
- '%s17', '%s18', '%s19', '%s20', '%s21', '%s22',
- '%s23', '%s24', '%s25', '%s26', '%s27', '%s28',
- '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12',
- '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6',
- '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11',
- '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13',
- '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12',
- '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15',
- '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10',
- '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ]
+calleeSavedRegisters: [ '$lr', '$d8', '$d9', '$d10', '$d11', '$d12', '$d13',
+ '$d14', '$d15', '$q4', '$q5', '$q6', '$q7', '$r4',
+ '$r5', '$r6', '$r7', '$r8', '$r10', '$r11', '$s16',
+ '$s17', '$s18', '$s19', '$s20', '$s21', '$s22',
+ '$s23', '$s24', '$s25', '$s26', '$s27', '$s28',
+ '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
+ '$d11_d13', '$d12_d14', '$d13_d15', '$q4_q5', '$q5_q6',
+ '$q6_q7', '$q4_q5_q6_q7', '$r4_r5', '$r6_r7', '$r10_r11',
+ '$d8_d9_d10', '$d9_d10_d11', '$d10_d11_d12', '$d11_d12_d13',
+ '$d12_d13_d14', '$d13_d14_d15', '$d8_d10_d12',
+ '$d9_d11_d13', '$d10_d12_d14', '$d11_d13_d15',
+ '$d8_d10_d12_d14', '$d9_d11_d13_d15', '$d9_d10',
+ '$d11_d12', '$d13_d14', '$d9_d10_d11_d12', '$d11_d12_d13_d14' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -102,22 +102,22 @@
hasVAStart: false
hasMustTailInVarArgFunc: false
stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' }
+ - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$lr' }
body: |
bb.0.entry:
- liveins: %lr
+ liveins: $lr
- early-clobber %sp = frame-setup t2STR_PRE killed undef %lr, %sp, -4, 14, _
+ early-clobber $sp = frame-setup t2STR_PRE killed undef $lr, $sp, -4, 14, _
frame-setup CFI_INSTRUCTION def_cfa_offset 4
- frame-setup CFI_INSTRUCTION offset %lr, -4
- tBL 14, _, @v, csr_ios, implicit-def dead %lr, implicit %sp, implicit-def %sp, implicit-def %r0, implicit-def %r1, implicit-def %r2, implicit-def %r3, debug-location !19
- %d1 = VMOVDRR killed %r2, killed %r3, 14, _, implicit-def %q0, debug-location !19
- %d0 = VMOVDRR killed %r0, killed %r1, 14, _, implicit killed %q0, implicit-def %q0, debug-location !19
- DBG_VALUE debug-use %q0, debug-use _, !14, !20, debug-location !21
- %s4 = VMOVS %s1, 14, _, implicit-def %d2, debug-location !24
- %d0 = VADDfd %d0, killed %d2, 14, _, implicit killed %q0, debug-location !24
- %r0 = VMOVRS %s0, 14, _, implicit killed %d0, debug-location !25
- %lr, %sp = t2LDR_POST %sp, 4, 14, _, debug-location !25
- tBX_RET 14, _, implicit %r0, debug-location !25
+ frame-setup CFI_INSTRUCTION offset $lr, -4
+ tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19
+ $d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19
+ $d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19
+ DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21
+ $s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24
+ $d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24
+ $r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25
+ $lr, $sp = t2LDR_POST $sp, 4, 14, _, debug-location !25
+ tBX_RET 14, _, implicit $r0, debug-location !25
...
diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
index f96748c..bef826e 100644
--- a/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
@@ -74,19 +74,19 @@
regBankSelected: false
selected: false
tracksRegLiveness: true
-calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13',
- '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4',
- '%r5', '%r6', '%r7', '%r8', '%r10', '%r11', '%s16',
- '%s17', '%s18', '%s19', '%s20', '%s21', '%s22',
- '%s23', '%s24', '%s25', '%s26', '%s27', '%s28',
- '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', '%d10_d12',
- '%d11_d13', '%d12_d14', '%d13_d15', '%q4_q5', '%q5_q6',
- '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', '%r6_r7', '%r10_r11',
- '%d8_d9_d10', '%d9_d10_d11', '%d10_d11_d12', '%d11_d12_d13',
- '%d12_d13_d14', '%d13_d14_d15', '%d8_d10_d12',
- '%d9_d11_d13', '%d10_d12_d14', '%d11_d13_d15',
- '%d8_d10_d12_d14', '%d9_d11_d13_d15', '%d9_d10',
- '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ]
+calleeSavedRegisters: [ '$lr', '$d8', '$d9', '$d10', '$d11', '$d12', '$d13',
+ '$d14', '$d15', '$q4', '$q5', '$q6', '$q7', '$r4',
+ '$r5', '$r6', '$r7', '$r8', '$r10', '$r11', '$s16',
+ '$s17', '$s18', '$s19', '$s20', '$s21', '$s22',
+ '$s23', '$s24', '$s25', '$s26', '$s27', '$s28',
+ '$s29', '$s30', '$s31', '$d8_d10', '$d9_d11', '$d10_d12',
+ '$d11_d13', '$d12_d14', '$d13_d15', '$q4_q5', '$q5_q6',
+ '$q6_q7', '$q4_q5_q6_q7', '$r4_r5', '$r6_r7', '$r10_r11',
+ '$d8_d9_d10', '$d9_d10_d11', '$d10_d11_d12', '$d11_d12_d13',
+ '$d12_d13_d14', '$d13_d14_d15', '$d8_d10_d12',
+ '$d9_d11_d13', '$d10_d12_d14', '$d11_d13_d15',
+ '$d8_d10_d12_d14', '$d9_d11_d13_d15', '$d9_d10',
+ '$d11_d12', '$d13_d14', '$d9_d10_d11_d12', '$d11_d12_d13_d14' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -102,22 +102,22 @@
hasVAStart: false
hasMustTailInVarArgFunc: false
stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' }
+ - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$lr' }
body: |
bb.0.entry:
- liveins: %lr
+ liveins: $lr
- early-clobber %sp = frame-setup t2STR_PRE killed undef %lr, %sp, -4, 14, _
+ early-clobber $sp = frame-setup t2STR_PRE killed undef $lr, $sp, -4, 14, _
frame-setup CFI_INSTRUCTION def_cfa_offset 4
- frame-setup CFI_INSTRUCTION offset %lr, -4
- tBL 14, _, @v, csr_ios, implicit-def dead %lr, implicit %sp, implicit-def %sp, implicit-def %r0, implicit-def %r1, implicit-def %r2, implicit-def %r3, debug-location !19
- %d1 = VMOVDRR killed %r2, killed %r3, 14, _, implicit-def %q0, debug-location !19
- %d0 = VMOVDRR killed %r0, killed %r1, 14, _, implicit killed %q0, implicit-def %q0, debug-location !19
- DBG_VALUE debug-use %q0, debug-use _, !14, !20, debug-location !21
- %s4 = VMOVS %s1, 14, _, implicit-def %d2, debug-location !24
- %d0 = VADDfd %d0, killed %d2, 14, _, implicit killed %q0, debug-location !24
- %r0 = VMOVRS %s0, 14, _, implicit killed %d0, debug-location !25
- %lr, %sp = t2LDR_POST %sp, 4, 14, _, debug-location !25
- tBX_RET 14, _, implicit %r0, debug-location !25
+ frame-setup CFI_INSTRUCTION offset $lr, -4
+ tBL 14, _, @v, csr_ios, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, debug-location !19
+ $d1 = VMOVDRR killed $r2, killed $r3, 14, _, implicit-def $q0, debug-location !19
+ $d0 = VMOVDRR killed $r0, killed $r1, 14, _, implicit killed $q0, implicit-def $q0, debug-location !19
+ DBG_VALUE debug-use $q0, debug-use _, !14, !20, debug-location !21
+ $s4 = VMOVS $s1, 14, _, implicit-def $d2, debug-location !24
+ $d0 = VADDfd $d0, killed $d2, 14, _, implicit killed $q0, debug-location !24
+ $r0 = VMOVRS $s0, 14, _, implicit killed $d0, debug-location !25
+ $lr, $sp = t2LDR_POST $sp, 4, 14, _, debug-location !25
+ tBX_RET 14, _, implicit $r0, debug-location !25
...
diff --git a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
index 9badc6c..92341d3b 100644
--- a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
@@ -21,7 +21,7 @@
#
# Check that last bundled instruction of block gets recognized as end of basic block.
# CHECK: bb.2.if.end
-# CHECK-NEXT: DBG_VALUE debug-use %s0, debug-use %noreg, !12, !DIExpression(), debug-location !17
+# CHECK-NEXT: DBG_VALUE debug-use $s0, debug-use $noreg, !12, !DIExpression(), debug-location !17
--- |
; ModuleID = '<stdin>'
@@ -118,7 +118,7 @@
tracksRegLiveness: false
registers:
liveins:
- - { reg: '%a0', virtual-reg: '' }
+ - { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -142,47 +142,47 @@
stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
di-variable: '', di-expression: '', di-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '%ra', callee-saved-restored: true,
+ stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
di-variable: '', di-expression: '', di-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '%s0', callee-saved-restored: true,
+ stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
di-variable: '', di-expression: '', di-location: '' }
constants:
body: |
bb.0.entry:
successors: %bb.2(0x30000000), %bb.1(0x50000000)
- %sp = ADDiu %sp, -32
+ $sp = ADDiu $sp, -32
CFI_INSTRUCTION def_cfa_offset 32
- SW killed %ra, %sp, 28 :: (store 4 into %stack.1)
- SW killed %s0, %sp, 24 :: (store 4 into %stack.2)
- CFI_INSTRUCTION offset %ra_64, -4
- CFI_INSTRUCTION offset %s0_64, -8
- DBG_VALUE debug-use %a0, debug-use %noreg, !12, !DIExpression(), debug-location !17
- %s0 = OR %a0, %zero
- DBG_VALUE debug-use %s0, debug-use %noreg, !12, !DIExpression(), debug-location !17
- DBG_VALUE %sp, 0, !13, !DIExpression(DW_OP_plus_uconst, 20), debug-location !19
- JAL @set_cond, csr_o32, implicit-def dead %ra, implicit %a0, implicit %a1, implicit-def %sp, debug-location !20 {
- renamable %a1 = LEA_ADDiu %sp, 20
+ SW killed $ra, $sp, 28 :: (store 4 into %stack.1)
+ SW killed $s0, $sp, 24 :: (store 4 into %stack.2)
+ CFI_INSTRUCTION offset $ra_64, -4
+ CFI_INSTRUCTION offset $s0_64, -8
+ DBG_VALUE debug-use $a0, debug-use $noreg, !12, !DIExpression(), debug-location !17
+ $s0 = OR $a0, $zero
+ DBG_VALUE debug-use $s0, debug-use $noreg, !12, !DIExpression(), debug-location !17
+ DBG_VALUE $sp, 0, !13, !DIExpression(DW_OP_plus_uconst, 20), debug-location !19
+ JAL @set_cond, csr_o32, implicit-def dead $ra, implicit $a0, implicit $a1, implicit-def $sp, debug-location !20 {
+ renamable $a1 = LEA_ADDiu $sp, 20
}
- renamable %at = LW %sp, 20, debug-location !21 :: (dereferenceable load 4 from %ir.condition, !tbaa !23)
- DBG_VALUE debug-use %at, debug-use %noreg, !13, !DIExpression(), debug-location !19
- BEQ killed renamable %at, %zero, %bb.2, implicit-def %at, debug-location !27 {
+ renamable $at = LW $sp, 20, debug-location !21 :: (dereferenceable load 4 from %ir.condition, !tbaa !23)
+ DBG_VALUE debug-use $at, debug-use $noreg, !13, !DIExpression(), debug-location !19
+ BEQ killed renamable $at, $zero, %bb.2, implicit-def $at, debug-location !27 {
NOP debug-location !27
}
bb.1.if.then:
successors: %bb.2(0x80000000)
- JAL @do_something, csr_o32, implicit-def dead %ra, implicit undef %a0, implicit %a1, implicit-def %sp, debug-location !28 {
- %a1 = OR killed %s0, %zero, debug-location !28
+ JAL @do_something, csr_o32, implicit-def dead $ra, implicit undef $a0, implicit $a1, implicit-def $sp, debug-location !28 {
+ $a1 = OR killed $s0, $zero, debug-location !28
}
bb.2.if.end:
- %s0 = LW %sp, 24, debug-location !29 :: (load 4 from %stack.2)
- %ra = LW %sp, 28, debug-location !29 :: (load 4 from %stack.1)
- PseudoReturn undef %ra, debug-location !29 {
- %sp = ADDiu %sp, 32
+ $s0 = LW $sp, 24, debug-location !29 :: (load 4 from %stack.2)
+ $ra = LW $sp, 28, debug-location !29 :: (load 4 from %stack.1)
+ PseudoReturn undef $ra, debug-location !29 {
+ $sp = ADDiu $sp, 32
}
...
diff --git a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
index e73990d..7622130 100644
--- a/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
+++ b/llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
@@ -62,7 +62,7 @@
selected: false
tracksRegLiveness: true
liveins:
- - { reg: '%edi' }
+ - { reg: '$edi' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -81,17 +81,17 @@
- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
body: |
bb.0.entry:
- liveins: %edi, %rbp
+ liveins: $edi, $rbp
- frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- CFI_INSTRUCTION offset %rbp, -16
- %rbp = frame-setup MOV64rr %rsp
- CFI_INSTRUCTION def_cfa_register %rbp
- DBG_VALUE debug-use %dh, debug-use _, !14, !15, debug-location !16
- %edi = SHR32ri killed %edi, 8, implicit-def dead %eflags, debug-location !17
- %eax = MOVSX32rr8 %dil, implicit killed %edi, debug-location !20
- %rbp = POP64r implicit-def %rsp, implicit %rsp, debug-location !20
- RETQ %eax, debug-location !20
+ CFI_INSTRUCTION offset $rbp, -16
+ $rbp = frame-setup MOV64rr $rsp
+ CFI_INSTRUCTION def_cfa_register $rbp
+ DBG_VALUE debug-use $dh, debug-use _, !14, !15, debug-location !16
+ $edi = SHR32ri killed $edi, 8, implicit-def dead $eflags, debug-location !17
+ $eax = MOVSX32rr8 $dil, implicit killed $edi, debug-location !20
+ $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !20
+ RETQ $eax, debug-location !20
...
diff --git a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
index 5e3274d..990bec7 100644
--- a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
+++ b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
@@ -78,7 +78,7 @@
selected: false
tracksRegLiveness: true
liveins:
- - { reg: '%rdi' }
+ - { reg: '$rdi' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -98,24 +98,24 @@
body: |
bb.0 (%ir-block.1):
successors: %bb.1(0x30000000), %bb.2(0x50000000)
- liveins: %rdi
+ liveins: $rdi
- CMP64mi8 %rip, 1, _, @a, _, 0, implicit-def %eflags :: (dereferenceable load 8 from @a, align 4)
- JE_1 %bb.1, implicit %eflags
+ CMP64mi8 $rip, 1, _, @a, _, 0, implicit-def $eflags :: (dereferenceable load 8 from @a, align 4)
+ JE_1 %bb.1, implicit $eflags
bb.2 (%ir-block.5):
- liveins: %rdi
+ liveins: $rdi
- %rax = MOV64rm %rdi, 1, _, 0, _ :: (load 8 from %ir.6, align 4)
- %al = MOV8rm killed %rax, 1, _, 0, _ :: (load 1 from %ir.8)
- MOV8mr killed %rdi, 1, _, 8, _, killed %al, debug-location !14 :: (store 1 into %ir.12)
- RETQ undef %eax
+ $rax = MOV64rm $rdi, 1, _, 0, _ :: (load 8 from %ir.6, align 4)
+ $al = MOV8rm killed $rax, 1, _, 0, _ :: (load 1 from %ir.8)
+ MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store 1 into %ir.12)
+ RETQ undef $eax
bb.1:
- liveins: %rdi
+ liveins: $rdi
- %al = IMPLICIT_DEF debug-location !10
- MOV8mr killed %rdi, 1, _, 8, _, killed %al, debug-location !14 :: (store 1 into %ir.12)
- RETQ undef %eax
+ $al = IMPLICIT_DEF debug-location !10
+ MOV8mr killed $rdi, 1, _, 8, _, killed $al, debug-location !14 :: (store 1 into %ir.12)
+ RETQ undef $eax
...
diff --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
index a664abc..8d18053 100644
--- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
@@ -14,8 +14,8 @@
# ...
#
# CHECK: bb.1.if.end:
-# CHECK: DBG_VALUE debug-use %rbp, 0, !37, !DIExpression(DW_OP_constu, 44, DW_OP_minus), debug-location !58
-# CHECK-NOT: DBG_VALUE debug-use %rbp, 0, !36, !DIExpression(DW_OP_constu, 48, DW_OP_minus), debug-location !57
+# CHECK: DBG_VALUE debug-use $rbp, 0, !37, !DIExpression(DW_OP_constu, 44, DW_OP_minus), debug-location !58
+# CHECK-NOT: DBG_VALUE debug-use $rbp, 0, !36, !DIExpression(DW_OP_constu, 48, DW_OP_minus), debug-location !57
--- |
; ModuleID = '<stdin>'
@@ -211,8 +211,8 @@
tracksRegLiveness: true
registers:
liveins:
- - { reg: '%edi', virtual-reg: '' }
- - { reg: '%esi', virtual-reg: '' }
+ - { reg: '$edi', virtual-reg: '' }
+ - { reg: '$esi', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -232,15 +232,15 @@
restorePoint: ''
fixedStack:
- { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: 0,
- callee-saved-register: '%rbx', callee-saved-restored: true }
+ callee-saved-register: '$rbx', callee-saved-restored: true }
- { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: 0,
- callee-saved-register: '%r12', callee-saved-restored: true }
+ callee-saved-register: '$r12', callee-saved-restored: true }
- { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: 0,
- callee-saved-register: '%r13', callee-saved-restored: true }
+ callee-saved-register: '$r13', callee-saved-restored: true }
- { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: 0,
- callee-saved-register: '%r14', callee-saved-restored: true }
+ callee-saved-register: '$r14', callee-saved-restored: true }
- { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
- callee-saved-register: '%r15', callee-saved-restored: true }
+ callee-saved-register: '$r15', callee-saved-restored: true }
- { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
callee-saved-register: '', callee-saved-restored: true }
stack:
@@ -254,135 +254,135 @@
body: |
bb.0.entry:
successors: %bb.9(0x30000000), %bb.1(0x50000000)
- liveins: %edi, %esi, %r15, %r14, %r13, %r12, %rbx
+ liveins: $edi, $esi, $r15, $r14, $r13, $r12, $rbx
- frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- CFI_INSTRUCTION offset %rbp, -16
- %rbp = frame-setup MOV64rr %rsp
- CFI_INSTRUCTION def_cfa_register %rbp
- frame-setup PUSH64r killed %r15, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %r14, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %r13, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %r12, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
- CFI_INSTRUCTION offset %rbx, -56
- CFI_INSTRUCTION offset %r12, -48
- CFI_INSTRUCTION offset %r13, -40
- CFI_INSTRUCTION offset %r14, -32
- CFI_INSTRUCTION offset %r15, -24
- DBG_VALUE debug-use %edi, debug-use %noreg, !36, !DIExpression(), debug-location !57
- DBG_VALUE debug-use %esi, debug-use %noreg, !37, !DIExpression(), debug-location !58
- %ebx = MOV32rr %esi
- DBG_VALUE %ebx, debug-use %noreg, !37, !DIExpression(), debug-location !58
- %r15d = MOV32rr %edi
- DBG_VALUE %r15d, debug-use %noreg, !36, !DIExpression(), debug-location !57
- renamable %r14 = MOV64ri -9223372036854775808
- %edi = MOV32rr %ebx
- CALL64pcrel32 @func1, csr_64, implicit %rsp, implicit %ssp, implicit %edi, implicit-def %rsp, implicit-def %ssp, implicit-def %rax
- %r13 = MOV64rr %rax
- renamable %ecx = XOR32rr undef %ecx, undef %ecx, implicit-def dead %eflags
- renamable %r13 = AND64rr killed renamable %r13, renamable %r14, implicit-def %eflags
- JE_1 %bb.9, implicit %eflags
+ CFI_INSTRUCTION offset $rbp, -16
+ $rbp = frame-setup MOV64rr $rsp
+ CFI_INSTRUCTION def_cfa_register $rbp
+ frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r13, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
+ CFI_INSTRUCTION offset $rbx, -56
+ CFI_INSTRUCTION offset $r12, -48
+ CFI_INSTRUCTION offset $r13, -40
+ CFI_INSTRUCTION offset $r14, -32
+ CFI_INSTRUCTION offset $r15, -24
+ DBG_VALUE debug-use $edi, debug-use $noreg, !36, !DIExpression(), debug-location !57
+ DBG_VALUE debug-use $esi, debug-use $noreg, !37, !DIExpression(), debug-location !58
+ $ebx = MOV32rr $esi
+ DBG_VALUE $ebx, debug-use $noreg, !37, !DIExpression(), debug-location !58
+ $r15d = MOV32rr $edi
+ DBG_VALUE $r15d, debug-use $noreg, !36, !DIExpression(), debug-location !57
+ renamable $r14 = MOV64ri -9223372036854775808
+ $edi = MOV32rr $ebx
+ CALL64pcrel32 @func1, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ $r13 = MOV64rr $rax
+ renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
+ renamable $r13 = AND64rr killed renamable $r13, renamable $r14, implicit-def $eflags
+ JE_1 %bb.9, implicit $eflags
bb.1.if.end:
successors: %bb.2(0x30000000), %bb.3(0x50000000)
- liveins: %ebx, %r13, %r14, %r15d
+ liveins: $ebx, $r13, $r14, $r15d
; The instruction below is inserted additionally in order to test part of the code.
- %r12d = MOV32rr %r15d
- MOV32mr %rbp, 1, %noreg, -48, %noreg, renamable %r15d :: (store 4 into %stack.0)
- ; The instruction below is altered (%r15d -> %r12d) in order to test part of the code.
- ; The original instruction "%edi = MOV32rr killed %r15d
- %edi = MOV32rr killed %r12d
- MOV32mr %rbp, 1, %noreg, -44, %noreg, renamable %ebx :: (store 4 into %stack.1)
- %esi = MOV32rr killed %ebx
- CALL64pcrel32 @func2, csr_64, implicit %rsp, implicit %ssp, implicit %edi, implicit %esi, implicit-def %rsp, implicit-def %ssp, implicit-def %rax
- %r12 = MOV64rr %rax
- %r15 = MOV64rr %r12
- renamable %r15 = AND64ri8 killed renamable %r15, -123, implicit-def %eflags
- JE_1 %bb.2, implicit %eflags
+ $r12d = MOV32rr $r15d
+ MOV32mr $rbp, 1, $noreg, -48, $noreg, renamable $r15d :: (store 4 into %stack.0)
+ ; The instruction below is altered ($r15d -> $r12d) in order to test part of the code.
+ ; The original instruction "$edi = MOV32rr killed $r15d
+ $edi = MOV32rr killed $r12d
+ MOV32mr $rbp, 1, $noreg, -44, $noreg, renamable $ebx :: (store 4 into %stack.1)
+ $esi = MOV32rr killed $ebx
+ CALL64pcrel32 @func2, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
+ $r12 = MOV64rr $rax
+ $r15 = MOV64rr $r12
+ renamable $r15 = AND64ri8 killed renamable $r15, -123, implicit-def $eflags
+ JE_1 %bb.2, implicit $eflags
bb.3.private.exit:
successors: %bb.9(0x30000000), %bb.4(0x50000000)
- liveins: %r12, %r13, %r14, %r15
+ liveins: $r12, $r13, $r14, $r15
- renamable %r14 = OR64rr killed renamable %r14, renamable %r12, implicit-def dead %eflags
- %esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
- dead %edx = MOV32ri 16, implicit-def %rdx
- %rdi = MOV64rr killed %r14
- CALL64pcrel32 @memset, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit %esi, implicit %rdx, implicit-def %rsp, implicit-def %ssp, implicit-def dead %rax
- %rdi = MOV64rr %r12
- CALL64pcrel32 @func4, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit-def %rsp, implicit-def %ssp, implicit-def %eax
- renamable %ecx = MOV32ri 1
- TEST32rr killed renamable %eax, renamable %eax, implicit-def %eflags
- JE_1 %bb.9, implicit %eflags
+ renamable $r14 = OR64rr killed renamable $r14, renamable $r12, implicit-def dead $eflags
+ $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags
+ dead $edx = MOV32ri 16, implicit-def $rdx
+ $rdi = MOV64rr killed $r14
+ CALL64pcrel32 @memset, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $esi, implicit $rdx, implicit-def $rsp, implicit-def $ssp, implicit-def dead $rax
+ $rdi = MOV64rr $r12
+ CALL64pcrel32 @func4, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+ renamable $ecx = MOV32ri 1
+ TEST32rr killed renamable $eax, renamable $eax, implicit-def $eflags
+ JE_1 %bb.9, implicit $eflags
bb.4.if.then8:
successors: %bb.8(0x30000000), %bb.5(0x50000000)
- liveins: %r12, %r13, %r15
+ liveins: $r12, $r13, $r15
- %esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
- %rdi = MOV64rr %r12
- CALL64pcrel32 @func5, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit %esi, implicit-def %rsp, implicit-def %ssp
- renamable %rax = MOV64rm killed renamable %r13, 1, %noreg, 8, %noreg :: (load 8 from %ir.13)
- TEST64rr renamable %rax, renamable %rax, implicit-def %eflags
- JE_1 %bb.8, implicit %eflags
+ $esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags
+ $rdi = MOV64rr $r12
+ CALL64pcrel32 @func5, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $esi, implicit-def $rsp, implicit-def $ssp
+ renamable $rax = MOV64rm killed renamable $r13, 1, $noreg, 8, $noreg :: (load 8 from %ir.13)
+ TEST64rr renamable $rax, renamable $rax, implicit-def $eflags
+ JE_1 %bb.8, implicit $eflags
bb.5.land.lhs.true:
successors: %bb.6(0x30000000), %bb.7(0x50000000)
- liveins: %rax, %r12, %r15
+ liveins: $rax, $r12, $r15
- CMP32mi8 renamable %r15, 1, %noreg, 0, %noreg, 0, implicit-def %eflags :: (load 4 from %ir.tot_perf2, align 8)
- JNE_1 %bb.7, implicit %eflags
+ CMP32mi8 renamable $r15, 1, $noreg, 0, $noreg, 0, implicit-def $eflags :: (load 4 from %ir.tot_perf2, align 8)
+ JNE_1 %bb.7, implicit $eflags
bb.6.lor.lhs.false:
successors: %bb.8(0x30000000), %bb.7(0x50000000)
- liveins: %rax, %r12, %r15
+ liveins: $rax, $r12, $r15
- CMP32mi8 killed renamable %r15, 1, %noreg, 4, %noreg, 0, implicit-def %eflags :: (load 4 from %ir.tot_bw)
- JE_1 %bb.8, implicit %eflags
+ CMP32mi8 killed renamable $r15, 1, $noreg, 4, $noreg, 0, implicit-def $eflags :: (load 4 from %ir.tot_bw)
+ JE_1 %bb.8, implicit $eflags
bb.7.if.then14:
successors: %bb.8(0x80000000)
- liveins: %rax, %r12
+ liveins: $rax, $r12
- renamable %rdx = MOV64rm killed renamable %rax, 1, %noreg, 8, %noreg :: (load 8 from %ir.20)
- %rdi = MOV64rr killed %r12
- %esi = MOV32rm %rbp, 1, %noreg, -44, %noreg :: (load 4 from %stack.1)
- CALL64pcrel32 @func6, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit %esi, implicit %rdx, implicit-def %rsp, implicit-def %ssp
+ renamable $rdx = MOV64rm killed renamable $rax, 1, $noreg, 8, $noreg :: (load 8 from %ir.20)
+ $rdi = MOV64rr killed $r12
+ $esi = MOV32rm $rbp, 1, $noreg, -44, $noreg :: (load 4 from %stack.1)
+ CALL64pcrel32 @func6, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $esi, implicit $rdx, implicit-def $rsp, implicit-def $ssp
bb.8.cleanup:
successors: %bb.9(0x80000000)
- renamable %ecx = MOV32ri 1
+ renamable $ecx = MOV32ri 1
JMP_1 %bb.9
bb.2.if.then3:
successors: %bb.9(0x80000000)
- liveins: %r13
+ liveins: $r13
- renamable %edi = MOV32rm renamable %r13, 1, %noreg, 0, %noreg :: (load 4 from %ir.variableLocal11, align 8)
- renamable %esi = MOVZX32rm8 killed renamable %r13, 1, %noreg, 4, %noreg :: (load 1 from %ir.variableLocal2, align 4)
- renamable %ecx = MOV32ri @.str, implicit-def %rcx
- renamable %rcx = OR64ri32 killed renamable %rcx, -92238, implicit-def dead %eflags
- %edx = MOV32ri 5
- %r8d = MOV32rm %rbp, 1, %noreg, -48, %noreg :: (load 4 from %stack.0)
- CALL64pcrel32 @func3, csr_64, implicit %rsp, implicit %ssp, implicit %edi, implicit %esi, implicit %edx, implicit %rcx, implicit %r8d, implicit-def %rsp, implicit-def %ssp
- renamable %ecx = XOR32rr undef %ecx, undef %ecx, implicit-def dead %eflags
+ renamable $edi = MOV32rm renamable $r13, 1, $noreg, 0, $noreg :: (load 4 from %ir.variableLocal11, align 8)
+ renamable $esi = MOVZX32rm8 killed renamable $r13, 1, $noreg, 4, $noreg :: (load 1 from %ir.variableLocal2, align 4)
+ renamable $ecx = MOV32ri @.str, implicit-def $rcx
+ renamable $rcx = OR64ri32 killed renamable $rcx, -92238, implicit-def dead $eflags
+ $edx = MOV32ri 5
+ $r8d = MOV32rm $rbp, 1, $noreg, -48, $noreg :: (load 4 from %stack.0)
+ CALL64pcrel32 @func3, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit $esi, implicit $edx, implicit $rcx, implicit $r8d, implicit-def $rsp, implicit-def $ssp
+ renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
bb.9.cleanup:
- liveins: %ecx
+ liveins: $ecx
- %eax = MOV32rr killed %ecx
- %rsp = ADD64ri8 %rsp, 8, implicit-def dead %eflags
- %rbx = POP64r implicit-def %rsp, implicit %rsp
- %r12 = POP64r implicit-def %rsp, implicit %rsp
- %r13 = POP64r implicit-def %rsp, implicit %rsp
- %r14 = POP64r implicit-def %rsp, implicit %rsp
- %r15 = POP64r implicit-def %rsp, implicit %rsp
- %rbp = POP64r implicit-def %rsp, implicit %rsp
- RETQ %eax
+ $eax = MOV32rr killed $ecx
+ $rsp = ADD64ri8 $rsp, 8, implicit-def dead $eflags
+ $rbx = POP64r implicit-def $rsp, implicit $rsp
+ $r12 = POP64r implicit-def $rsp, implicit $rsp
+ $r13 = POP64r implicit-def $rsp, implicit $rsp
+ $r14 = POP64r implicit-def $rsp, implicit $rsp
+ $r15 = POP64r implicit-def $rsp, implicit $rsp
+ $rbp = POP64r implicit-def $rsp, implicit $rsp
+ RETQ $eax
...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
index 2041aba..59fb462 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
@@ -31,9 +31,9 @@
# DBG_VALUE for variables "x", "y" and "z" are extended into %bb.9 from its
# predecessors %bb.0, %bb.2 and %bb.8.
# CHECK: bb.9.for.end:
-# CHECK-DAG: DBG_VALUE debug-use %edi, debug-use %noreg, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
-# CHECK-DAG: DBG_VALUE debug-use %esi, debug-use %noreg, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
-# CHECK-DAG: DBG_VALUE debug-use %edx, debug-use %noreg, ![[Z_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-DAG: DBG_VALUE debug-use $edi, debug-use $noreg, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-DAG: DBG_VALUE debug-use $esi, debug-use $noreg, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-DAG: DBG_VALUE debug-use $edx, debug-use $noreg, ![[Z_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
# CHECK: RET
--- |
@@ -163,10 +163,10 @@
exposesReturnsTwice: false
tracksRegLiveness: true
liveins:
- - { reg: '%edi' }
- - { reg: '%esi' }
- - { reg: '%edx' }
- - { reg: '%ecx' }
+ - { reg: '$edi' }
+ - { reg: '$esi' }
+ - { reg: '$edx' }
+ - { reg: '$ecx' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -184,116 +184,116 @@
body: |
bb.0.entry:
successors: %bb.1.for.body.preheader(20), %bb.9.for.end(12)
- liveins: %ecx, %edi, %edx, %esi
+ liveins: $ecx, $edi, $edx, $esi
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %r8d = MOV32rr %esi, debug-location !26
- %r8d = IMUL32rr killed %r8d, %edi, implicit-def dead %eflags, debug-location !26
- TEST32rr %r8d, %r8d, implicit-def %eflags, debug-location !31
- JLE_1 %bb.9.for.end, implicit %eflags
+ $r8d = MOV32rr $esi, debug-location !26
+ $r8d = IMUL32rr killed $r8d, $edi, implicit-def dead $eflags, debug-location !26
+ TEST32rr $r8d, $r8d, implicit-def $eflags, debug-location !31
+ JLE_1 %bb.9.for.end, implicit $eflags
bb.1.for.body.preheader:
successors: %bb.3.for.body(0)
- liveins: %ecx, %edi, %edx, %esi, %r8d
+ liveins: $ecx, $edi, $edx, $esi, $r8d
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags
+ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
bb.3.for.body (align 4):
successors: %bb.4.if.then(4), %bb.5.if.end(124)
- liveins: %eax, %ecx, %edi, %edx, %esi, %r8d
+ liveins: $eax, $ecx, $edi, $edx, $esi, $r8d
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- TEST32rr %edi, %edi, implicit-def %eflags, debug-location !35
- JG_1 %bb.4.if.then, implicit %eflags
+ TEST32rr $edi, $edi, implicit-def $eflags, debug-location !35
+ JG_1 %bb.4.if.then, implicit $eflags
bb.5.if.end:
successors: %bb.6.if.then.4(4), %bb.7.if.end.6(124)
- liveins: %eax, %ecx, %edi, %edx, %esi, %r8d
+ liveins: $eax, $ecx, $edi, $edx, $esi, $r8d
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- TEST32rr %esi, %esi, implicit-def %eflags, debug-location !39
- JG_1 %bb.6.if.then.4, implicit %eflags
+ TEST32rr $esi, $esi, implicit-def $eflags, debug-location !39
+ JG_1 %bb.6.if.then.4, implicit $eflags
bb.7.if.end.6:
successors: %bb.8.if.then.8(4), %bb.2.for.cond(124)
- liveins: %eax, %ecx, %edi, %edx, %esi, %r8d
+ liveins: $eax, $ecx, $edi, $edx, $esi, $r8d
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- TEST32rr %edx, %edx, implicit-def %eflags, debug-location !45
- JG_1 %bb.8.if.then.8, implicit %eflags
+ TEST32rr $edx, $edx, implicit-def $eflags, debug-location !45
+ JG_1 %bb.8.if.then.8, implicit $eflags
bb.2.for.cond:
successors: %bb.3.for.body(124), %bb.9.for.end(4)
- liveins: %eax, %ecx, %edi, %edx, %esi, %r8d
+ liveins: $eax, $ecx, $edi, $edx, $esi, $r8d
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %eax = INC32r killed %eax, implicit-def dead %eflags, debug-location !44
- DBG_VALUE debug-use %eax, debug-use _, !13, !17, debug-location !25
- CMP32rr %eax, %r8d, implicit-def %eflags, debug-location !31
- JL_1 %bb.3.for.body, implicit %eflags
+ $eax = INC32r killed $eax, implicit-def dead $eflags, debug-location !44
+ DBG_VALUE debug-use $eax, debug-use _, !13, !17, debug-location !25
+ CMP32rr $eax, $r8d, implicit-def $eflags, debug-location !31
+ JL_1 %bb.3.for.body, implicit $eflags
JMP_1 %bb.9.for.end
bb.4.if.then:
- liveins: %ecx, %edi
+ liveins: $ecx, $edi
- DBG_VALUE debug-use %edi, debug-use _, !9, !17, debug-location !18
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edi, debug-use _, !9, !17, debug-location !18
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %ecx = IMUL32rr killed %ecx, killed %edi, implicit-def dead %eflags, debug-location !36
+ $ecx = IMUL32rr killed $ecx, killed $edi, implicit-def dead $eflags, debug-location !36
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %eax = MOV32rr killed %ecx, debug-location !50
- RETQ %eax, debug-location !50
+ $eax = MOV32rr killed $ecx, debug-location !50
+ RETQ $eax, debug-location !50
bb.6.if.then.4:
- liveins: %ecx, %esi
+ liveins: $ecx, $esi
- DBG_VALUE debug-use %esi, debug-use _, !10, !17, debug-location !19
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $esi, debug-use _, !10, !17, debug-location !19
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %ecx = IMUL32rr killed %ecx, killed %esi, implicit-def dead %eflags, debug-location !40
+ $ecx = IMUL32rr killed $ecx, killed $esi, implicit-def dead $eflags, debug-location !40
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %eax = MOV32rr killed %ecx, debug-location !50
- RETQ %eax, debug-location !50
+ $eax = MOV32rr killed $ecx, debug-location !50
+ RETQ $eax, debug-location !50
bb.8.if.then.8:
successors: %bb.9.for.end(0)
- liveins: %ecx, %edx
+ liveins: $ecx, $edx
- DBG_VALUE debug-use %edx, debug-use _, !11, !17, debug-location !21
- DBG_VALUE debug-use %ecx, debug-use _, !12, !17, debug-location !23
+ DBG_VALUE debug-use $edx, debug-use _, !11, !17, debug-location !21
+ DBG_VALUE debug-use $ecx, debug-use _, !12, !17, debug-location !23
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %ecx = IMUL32rr killed %ecx, killed %edx, implicit-def dead %eflags, debug-location !46
+ $ecx = IMUL32rr killed $ecx, killed $edx, implicit-def dead $eflags, debug-location !46
bb.9.for.end:
- liveins: %ecx
+ liveins: $ecx
DBG_VALUE 0, 0, !13, !17, debug-location !25
- %eax = MOV32rr killed %ecx, debug-location !50
- RETQ %eax, debug-location !50
+ $eax = MOV32rr killed $ecx, debug-location !50
+ RETQ $eax, debug-location !50
...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
index 6643c26..7abd7be 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
@@ -52,36 +52,36 @@
# GENERATE: ![[INTD:[0-9]+]] = !DILocalVariable(name: "intd",{{.*}})
#
# GENERATE: bb.1.if.end:
-# GENERATE: MOV32mr %rbp, 1, %noreg, -48, %noreg, killed %edx :: (store 4 into %stack.5)
-# GENERATE-NEXT: DBG_VALUE debug-use %rbp, 0, ![[INT0]], !DIExpression(DW_OP_constu, 48, DW_OP_minus)
-# GENERATE: MOV32mr %rbp, 1, %noreg, -52, %noreg, killed %r8d :: (store 4 into %stack.4)
-# GENERATE-NEXT: DBG_VALUE debug-use %rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
-# GENERATE: MOV32mr %rbp, 1, %noreg, -56, %noreg, killed %esi :: (store 4 into %stack.3)
-# GENERATE-NEXT: DBG_VALUE debug-use %rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
+# GENERATE: MOV32mr $rbp, 1, $noreg, -48, $noreg, killed $edx :: (store 4 into %stack.5)
+# GENERATE-NEXT: DBG_VALUE debug-use $rbp, 0, ![[INT0]], !DIExpression(DW_OP_constu, 48, DW_OP_minus)
+# GENERATE: MOV32mr $rbp, 1, $noreg, -52, $noreg, killed $r8d :: (store 4 into %stack.4)
+# GENERATE-NEXT: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
+# GENERATE: MOV32mr $rbp, 1, $noreg, -56, $noreg, killed $esi :: (store 4 into %stack.3)
+# GENERATE-NEXT: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
#
# Check that the spill locations that are valid at the end of bb.1.if.end are
# propagated to subsequent BBs.
#
# GENERATE: bb.2.if.then4:
# GENERATE-NOT: bb.3:
-# GENERATE-DAG: DBG_VALUE debug-use %rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
-# GENERATE-DAG: DBG_VALUE debug-use %rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
+# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
+# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
#
# GENERATE: bb.3:
# GENERATE-NOT: bb.4.if.end13:
-# GENERATE-DAG: DBG_VALUE debug-use %rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
-# GENERATE-DAG: DBG_VALUE debug-use %rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
+# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
+# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
#
# GENERATE: bb.4.if.end13:
# GENERATE-NOT: bb.5.cleanup:
-# GENERATE-DAG: DBG_VALUE debug-use %rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
-# GENERATE-DAG: DBG_VALUE debug-use %rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
+# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
+# GENERATE-DAG: DBG_VALUE debug-use $rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
#
# Check that the spill location rbp-48 (the variable int0) is not propagated
# because int0 is redefined within the same basic block.
#
# TERMINATE: bb.2.if.then4:
-# TERMINATE-NOT: DBG_VALUE debug-use %rbp, -48,
+# TERMINATE-NOT: DBG_VALUE debug-use $rbp, -48,
--- |
; ModuleID = '<stdin>'
source_filename = "spill1.c"
@@ -309,16 +309,16 @@
selected: false
tracksRegLiveness: true
liveins:
- - { reg: '%edi' }
- - { reg: '%esi' }
- - { reg: '%edx' }
- - { reg: '%ecx' }
- - { reg: '%r8d' }
- - { reg: '%r9d' }
-calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
- '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
- '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
- '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
+ - { reg: '$edi' }
+ - { reg: '$esi' }
+ - { reg: '$edx' }
+ - { reg: '$ecx' }
+ - { reg: '$r8d' }
+ - { reg: '$r9d' }
+calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',
+ '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',
+ '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',
+ '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -334,11 +334,11 @@
hasVAStart: false
hasMustTailInVarArgFunc: false
fixedStack:
- - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, callee-saved-register: '%rbx' }
- - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, callee-saved-register: '%r12' }
- - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, callee-saved-register: '%r13' }
- - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, callee-saved-register: '%r14' }
- - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '%r15' }
+ - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, callee-saved-register: '$rbx' }
+ - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, callee-saved-register: '$r12' }
+ - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, callee-saved-register: '$r13' }
+ - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, callee-saved-register: '$r14' }
+ - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$r15' }
- { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16 }
- { id: 6, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
stack:
@@ -351,122 +351,122 @@
body: |
bb.0.entry:
successors: %bb.1.if.end(0x30000000), %bb.5.cleanup(0x50000000)
- liveins: %ecx, %edi, %edx, %esi, %r8d, %r9d, %r15, %r14, %r13, %r12, %rbx, %rbp
+ liveins: $ecx, $edi, $edx, $esi, $r8d, $r9d, $r15, $r14, $r13, $r12, $rbx, $rbp
- frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- CFI_INSTRUCTION offset %rbp, -16
- %rbp = frame-setup MOV64rr %rsp
- CFI_INSTRUCTION def_cfa_register %rbp
- frame-setup PUSH64r killed %r15, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %r14, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %r13, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %r12, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
- %rsp = frame-setup SUB64ri8 %rsp, 24, implicit-def dead %eflags
- CFI_INSTRUCTION offset %rbx, -56
- CFI_INSTRUCTION offset %r12, -48
- CFI_INSTRUCTION offset %r13, -40
- CFI_INSTRUCTION offset %r14, -32
- CFI_INSTRUCTION offset %r15, -24
- DBG_VALUE debug-use %edi, debug-use _, !24, !38, debug-location !39
- DBG_VALUE debug-use %esi, debug-use _, !25, !38, debug-location !40
- DBG_VALUE debug-use %edx, debug-use _, !26, !38, debug-location !41
- DBG_VALUE debug-use %ecx, debug-use _, !27, !38, debug-location !42
- DBG_VALUE debug-use %r8d, debug-use _, !28, !38, debug-location !43
- DBG_VALUE debug-use %r9d, debug-use _, !29, !38, debug-location !44
- %r14d = MOV32rr %r8d
- DBG_VALUE debug-use %r14d, debug-use _, !28, !38, debug-location !43
- %r12d = MOV32rr %esi
- DBG_VALUE debug-use %r12d, debug-use _, !25, !38, debug-location !40
- %eax = MOV32rr %edi
- DBG_VALUE debug-use %eax, debug-use _, !24, !38, debug-location !39
- %r13d = MOV32rm %rip, 1, _, @glob0, _, debug-location !46 :: (dereferenceable load 4 from @glob0, !tbaa !47)
- DBG_VALUE debug-use %r13d, debug-use _, !31, !38, debug-location !51
- %r8d = MOV32rm %rip, 1, _, @glob1, _, debug-location !52 :: (dereferenceable load 4 from @glob1, !tbaa !47)
- DBG_VALUE debug-use %r8d, debug-use _, !32, !38, debug-location !53
- %r15d = MOV32rm %rip, 1, _, @glob2, _, debug-location !54 :: (dereferenceable load 4 from @glob2, !tbaa !47)
- DBG_VALUE debug-use %r15d, debug-use _, !33, !38, debug-location !55
- %esi = MOV32rm %rip, 1, _, @glob3, _, debug-location !56 :: (dereferenceable load 4 from @glob3, !tbaa !47)
- DBG_VALUE debug-use %esi, debug-use _, !34, !38, debug-location !57
- %ebx = MOV32rm %rip, 1, _, @glob4, _, debug-location !59 :: (dereferenceable load 4 from @glob4, !tbaa !47)
- DBG_VALUE debug-use %ebx, debug-use _, !35, !38, debug-location !60
- MOV32mr %rbp, 1, _, -44, _, %ebx, debug-location !60 :: (store 4 into %ir.inte, !tbaa !47)
- %edi = MOV32rm %rip, 1, _, @glob5, _, debug-location !62 :: (dereferenceable load 4 from @glob5, !tbaa !47)
- DBG_VALUE debug-use %edi, debug-use _, !36, !38, debug-location !63
- MOV32mr %rbp, 1, _, -60, _, %edi, debug-location !63 :: (store 4 into %ir.intf, !tbaa !47)
- TEST32rr killed %eax, %eax, implicit-def %eflags, debug-location !67
- JNE_1 %bb.5.cleanup, implicit %eflags
+ CFI_INSTRUCTION offset $rbp, -16
+ $rbp = frame-setup MOV64rr $rsp
+ CFI_INSTRUCTION def_cfa_register $rbp
+ frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r13, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+ $rsp = frame-setup SUB64ri8 $rsp, 24, implicit-def dead $eflags
+ CFI_INSTRUCTION offset $rbx, -56
+ CFI_INSTRUCTION offset $r12, -48
+ CFI_INSTRUCTION offset $r13, -40
+ CFI_INSTRUCTION offset $r14, -32
+ CFI_INSTRUCTION offset $r15, -24
+ DBG_VALUE debug-use $edi, debug-use _, !24, !38, debug-location !39
+ DBG_VALUE debug-use $esi, debug-use _, !25, !38, debug-location !40
+ DBG_VALUE debug-use $edx, debug-use _, !26, !38, debug-location !41
+ DBG_VALUE debug-use $ecx, debug-use _, !27, !38, debug-location !42
+ DBG_VALUE debug-use $r8d, debug-use _, !28, !38, debug-location !43
+ DBG_VALUE debug-use $r9d, debug-use _, !29, !38, debug-location !44
+ $r14d = MOV32rr $r8d
+ DBG_VALUE debug-use $r14d, debug-use _, !28, !38, debug-location !43
+ $r12d = MOV32rr $esi
+ DBG_VALUE debug-use $r12d, debug-use _, !25, !38, debug-location !40
+ $eax = MOV32rr $edi
+ DBG_VALUE debug-use $eax, debug-use _, !24, !38, debug-location !39
+ $r13d = MOV32rm $rip, 1, _, @glob0, _, debug-location !46 :: (dereferenceable load 4 from @glob0, !tbaa !47)
+ DBG_VALUE debug-use $r13d, debug-use _, !31, !38, debug-location !51
+ $r8d = MOV32rm $rip, 1, _, @glob1, _, debug-location !52 :: (dereferenceable load 4 from @glob1, !tbaa !47)
+ DBG_VALUE debug-use $r8d, debug-use _, !32, !38, debug-location !53
+ $r15d = MOV32rm $rip, 1, _, @glob2, _, debug-location !54 :: (dereferenceable load 4 from @glob2, !tbaa !47)
+ DBG_VALUE debug-use $r15d, debug-use _, !33, !38, debug-location !55
+ $esi = MOV32rm $rip, 1, _, @glob3, _, debug-location !56 :: (dereferenceable load 4 from @glob3, !tbaa !47)
+ DBG_VALUE debug-use $esi, debug-use _, !34, !38, debug-location !57
+ $ebx = MOV32rm $rip, 1, _, @glob4, _, debug-location !59 :: (dereferenceable load 4 from @glob4, !tbaa !47)
+ DBG_VALUE debug-use $ebx, debug-use _, !35, !38, debug-location !60
+ MOV32mr $rbp, 1, _, -44, _, $ebx, debug-location !60 :: (store 4 into %ir.inte, !tbaa !47)
+ $edi = MOV32rm $rip, 1, _, @glob5, _, debug-location !62 :: (dereferenceable load 4 from @glob5, !tbaa !47)
+ DBG_VALUE debug-use $edi, debug-use _, !36, !38, debug-location !63
+ MOV32mr $rbp, 1, _, -60, _, $edi, debug-location !63 :: (store 4 into %ir.intf, !tbaa !47)
+ TEST32rr killed $eax, $eax, implicit-def $eflags, debug-location !67
+ JNE_1 %bb.5.cleanup, implicit $eflags
bb.1.if.end:
successors: %bb.2(0x30000000), %bb.3.if.then4(0x50000000)
- liveins: %ebx, %ecx, %edi, %edx, %esi, %r8d, %r9d, %r12d, %r13d, %r14d, %r15d, %rbp
+ liveins: $ebx, $ecx, $edi, $edx, $esi, $r8d, $r9d, $r12d, $r13d, $r14d, $r15d, $rbp
- MOV32mr %rbp, 1, _, -48, _, killed %edx :: (store 4 into %stack.5)
- MOV32mr %rbp, 1, _, -52, _, killed %r8d :: (store 4 into %stack.4)
- MOV32mr %rbp, 1, _, -56, _, killed %esi :: (store 4 into %stack.3)
+ MOV32mr $rbp, 1, _, -48, _, killed $edx :: (store 4 into %stack.5)
+ MOV32mr $rbp, 1, _, -52, _, killed $r8d :: (store 4 into %stack.4)
+ MOV32mr $rbp, 1, _, -56, _, killed $esi :: (store 4 into %stack.3)
DBG_VALUE debug-use _, debug-use _, !30, !38, debug-location !45
- %r14d = ADD32rr killed %r14d, killed %ecx, implicit-def dead %eflags, debug-location !68
- %r14d = ADD32rr killed %r14d, killed %r9d, implicit-def dead %eflags, debug-location !69
- %r14d = IMUL32rm killed %r14d, %rbp, 1, _, 16, _, implicit-def dead %eflags, debug-location !70 :: (load 4 from %fixed-stack.6, align 16)
- DBG_VALUE debug-use %r14d, debug-use _, !26, !38, debug-location !41
- CALL64pcrel32 @use, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, debug-location !72
- %edi = MOV32rr killed %ebx, debug-location !73
- CALL64pcrel32 @use, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, debug-location !73
- TEST32rr killed %r12d, %r12d, implicit-def %eflags, debug-location !74
- JE_1 %bb.2, implicit %eflags
+ $r14d = ADD32rr killed $r14d, killed $ecx, implicit-def dead $eflags, debug-location !68
+ $r14d = ADD32rr killed $r14d, killed $r9d, implicit-def dead $eflags, debug-location !69
+ $r14d = IMUL32rm killed $r14d, $rbp, 1, _, 16, _, implicit-def dead $eflags, debug-location !70 :: (load 4 from %fixed-stack.6, align 16)
+ DBG_VALUE debug-use $r14d, debug-use _, !26, !38, debug-location !41
+ CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !72
+ $edi = MOV32rr killed $ebx, debug-location !73
+ CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !73
+ TEST32rr killed $r12d, $r12d, implicit-def $eflags, debug-location !74
+ JE_1 %bb.2, implicit $eflags
bb.3.if.then4:
successors: %bb.4.if.end13(0x80000000)
- liveins: %r14d, %r15d, %rbp
+ liveins: $r14d, $r15d, $rbp
- %rdi = LEA64r %rbp, 1, _, -44, _
- DBG_VALUE %rbp, -44, !35, !38, debug-location !60
- %rsi = LEA64r %rbp, 1, _, -60, _
- DBG_VALUE %rbp, -60, !36, !38, debug-location !63
- %rdx = LEA64r %rbp, 1, _, -64, _
- DBG_VALUE %rbp, -64, !37, !38, debug-location !78
- CALL64pcrel32 @set, csr_64, implicit %rsp, implicit %rdi, implicit %rsi, implicit %rdx, implicit-def %rsp, debug-location !79
- %eax = MOV32rm %rbp, 1, _, -44, _, debug-location !81 :: (dereferenceable load 4 from %ir.inte, !tbaa !47)
- DBG_VALUE debug-use %eax, debug-use _, !35, !38, debug-location !60
- %r15d = ADD32rm killed %r15d, %rbp, 1, _, -52, _, implicit-def dead %eflags, debug-location !82 :: (load 4 from %stack.4)
- %r15d = IMUL32rr killed %r15d, %eax, implicit-def dead %eflags, debug-location !82
- %r15d = ADD32rm killed %r15d, %rbp, 1, _, -56, _, implicit-def dead %eflags, debug-location !83 :: (load 4 from %stack.3)
- %r15d = IMUL32rr killed %r15d, killed %eax, implicit-def dead %eflags, debug-location !84
- DBG_VALUE debug-use %r15d, debug-use _, !31, !38, debug-location !51
- %r13d = MOV32rr killed %r15d
- DBG_VALUE debug-use %r13d, debug-use _, !31, !38, debug-location !51
+ $rdi = LEA64r $rbp, 1, _, -44, _
+ DBG_VALUE $rbp, -44, !35, !38, debug-location !60
+ $rsi = LEA64r $rbp, 1, _, -60, _
+ DBG_VALUE $rbp, -60, !36, !38, debug-location !63
+ $rdx = LEA64r $rbp, 1, _, -64, _
+ DBG_VALUE $rbp, -64, !37, !38, debug-location !78
+ CALL64pcrel32 @set, csr_64, implicit $rsp, implicit $rdi, implicit $rsi, implicit $rdx, implicit-def $rsp, debug-location !79
+ $eax = MOV32rm $rbp, 1, _, -44, _, debug-location !81 :: (dereferenceable load 4 from %ir.inte, !tbaa !47)
+ DBG_VALUE debug-use $eax, debug-use _, !35, !38, debug-location !60
+ $r15d = ADD32rm killed $r15d, $rbp, 1, _, -52, _, implicit-def dead $eflags, debug-location !82 :: (load 4 from %stack.4)
+ $r15d = IMUL32rr killed $r15d, $eax, implicit-def dead $eflags, debug-location !82
+ $r15d = ADD32rm killed $r15d, $rbp, 1, _, -56, _, implicit-def dead $eflags, debug-location !83 :: (load 4 from %stack.3)
+ $r15d = IMUL32rr killed $r15d, killed $eax, implicit-def dead $eflags, debug-location !84
+ DBG_VALUE debug-use $r15d, debug-use _, !31, !38, debug-location !51
+ $r13d = MOV32rr killed $r15d
+ DBG_VALUE debug-use $r13d, debug-use _, !31, !38, debug-location !51
JMP_1 %bb.4.if.end13
bb.2:
successors: %bb.4.if.end13(0x80000000)
- liveins: %r13d, %r14d, %rbp
+ liveins: $r13d, $r14d, $rbp
- %r14d = ADD32rm killed %r14d, %rbp, 1, _, -48, _, implicit-def dead %eflags, debug-location !71 :: (load 4 from %stack.5)
- DBG_VALUE debug-use %r14d, debug-use _, !26, !38, debug-location !41
+ $r14d = ADD32rm killed $r14d, $rbp, 1, _, -48, _, implicit-def dead $eflags, debug-location !71 :: (load 4 from %stack.5)
+ DBG_VALUE debug-use $r14d, debug-use _, !26, !38, debug-location !41
bb.4.if.end13:
successors: %bb.5.cleanup(0x80000000)
- liveins: %r13d, %r14d, %rbp
+ liveins: $r13d, $r14d, $rbp
- DBG_VALUE debug-use %r14d, debug-use _, !26, !38, debug-location !41
- DBG_VALUE debug-use %r13d, debug-use _, !31, !38, debug-location !51
- %r13d = IMUL32rm killed %r13d, %rbp, 1, _, 16, _, implicit-def dead %eflags, debug-location !86 :: (load 4 from %fixed-stack.6, align 16)
- %r13d = ADD32rr killed %r13d, killed %r14d, implicit-def dead %eflags, debug-location !87
- DBG_VALUE debug-use %r13d, debug-use _, !26, !38, debug-location !41
- %edi = MOV32rr killed %r13d, debug-location !88
- CALL64pcrel32 @use, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, debug-location !88
+ DBG_VALUE debug-use $r14d, debug-use _, !26, !38, debug-location !41
+ DBG_VALUE debug-use $r13d, debug-use _, !31, !38, debug-location !51
+ $r13d = IMUL32rm killed $r13d, $rbp, 1, _, 16, _, implicit-def dead $eflags, debug-location !86 :: (load 4 from %fixed-stack.6, align 16)
+ $r13d = ADD32rr killed $r13d, killed $r14d, implicit-def dead $eflags, debug-location !87
+ DBG_VALUE debug-use $r13d, debug-use _, !26, !38, debug-location !41
+ $edi = MOV32rr killed $r13d, debug-location !88
+ CALL64pcrel32 @use, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !88
bb.5.cleanup:
- liveins: %rbp
+ liveins: $rbp
- %rsp = ADD64ri8 %rsp, 24, implicit-def dead %eflags, debug-location !90
- %rbx = POP64r implicit-def %rsp, implicit %rsp, debug-location !90
- %r12 = POP64r implicit-def %rsp, implicit %rsp, debug-location !90
- %r13 = POP64r implicit-def %rsp, implicit %rsp, debug-location !90
- %r14 = POP64r implicit-def %rsp, implicit %rsp, debug-location !90
- %r15 = POP64r implicit-def %rsp, implicit %rsp, debug-location !90
- %rbp = POP64r implicit-def %rsp, implicit %rsp, debug-location !90
+ $rsp = ADD64ri8 $rsp, 24, implicit-def dead $eflags, debug-location !90
+ $rbx = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
+ $r12 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
+ $r13 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
+ $r14 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
+ $r15 = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
+ $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !90
RETQ debug-location !90
...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
index 7b6f0e7..3def95b 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
@@ -35,7 +35,7 @@
# CHECK: ![[N_VAR:[0-9]+]] = !DILocalVariable(name: "n",{{.*}})
#
# CHECK: bb.5.if.end.7:
-# CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[N_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[N_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
--- |
@@ -163,12 +163,12 @@
exposesReturnsTwice: false
tracksRegLiveness: true
liveins:
- - { reg: '%edi' }
- - { reg: '%rsi' }
-calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
- '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
- '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
- '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
+ - { reg: '$edi' }
+ - { reg: '$rsi' }
+calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',
+ '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',
+ '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',
+ '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -184,74 +184,74 @@
hasVAStart: false
hasMustTailInVarArgFunc: false
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%rbx' }
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '$rbx' }
body: |
bb.0.entry:
successors: %bb.1.if.else(16), %bb.2.if.end(16)
- liveins: %edi, %rsi, %rbx
+ liveins: $edi, $rsi, $rbx
- frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
+ frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- CFI_INSTRUCTION offset %rbx, -16
- DBG_VALUE debug-use %edi, debug-use _, !12, !20, debug-location !21
- DBG_VALUE debug-use %rsi, debug-use _, !13, !20, debug-location !22
- %eax = MOV32rr %edi
- DBG_VALUE debug-use %eax, debug-use _, !12, !20, debug-location !21
- %edi = MOV32ri 2
- CMP32ri8 killed %eax, 2, implicit-def %eflags, debug-location !26
- JNE_1 %bb.2.if.end, implicit %eflags
+ CFI_INSTRUCTION offset $rbx, -16
+ DBG_VALUE debug-use $edi, debug-use _, !12, !20, debug-location !21
+ DBG_VALUE debug-use $rsi, debug-use _, !13, !20, debug-location !22
+ $eax = MOV32rr $edi
+ DBG_VALUE debug-use $eax, debug-use _, !12, !20, debug-location !21
+ $edi = MOV32ri 2
+ CMP32ri8 killed $eax, 2, implicit-def $eflags, debug-location !26
+ JNE_1 %bb.2.if.end, implicit $eflags
bb.1.if.else:
successors: %bb.2.if.end(0)
- liveins: %rsi
+ liveins: $rsi
- DBG_VALUE debug-use %rsi, debug-use _, !13, !20, debug-location !22
- %rdi = MOV64rm killed %rsi, 1, _, 8, _, debug-location !27 :: (load 8 from %ir.arrayidx, !tbaa !28)
- dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al, debug-location !32
- CALL64pcrel32 @atoi, csr_64, implicit %rsp, implicit %rdi, implicit %al, implicit-def %rsp, implicit-def %eax, debug-location !32
- %edi = MOV32rr %eax, debug-location !32
- DBG_VALUE debug-use %edi, debug-use _, !14, !20, debug-location !33
+ DBG_VALUE debug-use $rsi, debug-use _, !13, !20, debug-location !22
+ $rdi = MOV64rm killed $rsi, 1, _, 8, _, debug-location !27 :: (load 8 from %ir.arrayidx, !tbaa !28)
+ dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al, debug-location !32
+ CALL64pcrel32 @atoi, csr_64, implicit $rsp, implicit $rdi, implicit $al, implicit-def $rsp, implicit-def $eax, debug-location !32
+ $edi = MOV32rr $eax, debug-location !32
+ DBG_VALUE debug-use $edi, debug-use _, !14, !20, debug-location !33
bb.2.if.end:
successors: %bb.3.if.then.3(16), %bb.4.if.else.5(16)
- liveins: %edi
+ liveins: $edi
- CALL64pcrel32 @change, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax, debug-location !34
- %ebx = MOV32rr %eax, debug-location !34
- DBG_VALUE debug-use %ebx, debug-use _, !14, !20, debug-location !33
- CMP32ri8 %ebx, 11, implicit-def %eflags, debug-location !37
- JL_1 %bb.4.if.else.5, implicit killed %eflags, debug-location !37
+ CALL64pcrel32 @change, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax, debug-location !34
+ $ebx = MOV32rr $eax, debug-location !34
+ DBG_VALUE debug-use $ebx, debug-use _, !14, !20, debug-location !33
+ CMP32ri8 $ebx, 11, implicit-def $eflags, debug-location !37
+ JL_1 %bb.4.if.else.5, implicit killed $eflags, debug-location !37
bb.3.if.then.3:
successors: %bb.5.if.end.7(0)
- liveins: %ebx
+ liveins: $ebx
- DBG_VALUE debug-use %ebx, debug-use _, !14, !20, debug-location !33
- %edi = MOV32rr %ebx, debug-location !38
- CALL64pcrel32 @modify, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax, debug-location !38
- %ecx = MOV32rr %eax, debug-location !38
- %ecx = ADD32rr killed %ecx, killed %ebx, implicit-def dead %eflags, debug-location !40
+ DBG_VALUE debug-use $ebx, debug-use _, !14, !20, debug-location !33
+ $edi = MOV32rr $ebx, debug-location !38
+ CALL64pcrel32 @modify, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax, debug-location !38
+ $ecx = MOV32rr $eax, debug-location !38
+ $ecx = ADD32rr killed $ecx, killed $ebx, implicit-def dead $eflags, debug-location !40
JMP_1 %bb.5.if.end.7
bb.4.if.else.5:
successors: %bb.5.if.end.7(0)
- liveins: %ebx
+ liveins: $ebx
- DBG_VALUE debug-use %ebx, debug-use _, !14, !20, debug-location !33
- %edi = MOV32rr killed %ebx, debug-location !42
- CALL64pcrel32 @inc, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax, debug-location !42
- %ecx = MOV32rr %eax, debug-location !42
+ DBG_VALUE debug-use $ebx, debug-use _, !14, !20, debug-location !33
+ $edi = MOV32rr killed $ebx, debug-location !42
+ CALL64pcrel32 @inc, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, implicit-def $eax, debug-location !42
+ $ecx = MOV32rr $eax, debug-location !42
bb.5.if.end.7:
- liveins: %ecx
+ liveins: $ecx
- MOV32mr %rip, 1, _, @m, _, %ecx, debug-location !43 :: (store 4 into @m, !tbaa !44)
- dead undef %edi = MOV32ri64 @.str, implicit-def %rdi, debug-location !46
- dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al, debug-location !47
- %esi = MOV32rr killed %ecx, debug-location !46
- CALL64pcrel32 @printf, csr_64, implicit %rsp, implicit %rdi, implicit %esi, implicit %al, implicit-def %rsp, implicit-def dead %eax, debug-location !46
- %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, debug-location !47
- %rbx = POP64r implicit-def %rsp, implicit %rsp, debug-location !47
- RETQ %eax, debug-location !47
+ MOV32mr $rip, 1, _, @m, _, $ecx, debug-location !43 :: (store 4 into @m, !tbaa !44)
+ dead undef $edi = MOV32ri64 @.str, implicit-def $rdi, debug-location !46
+ dead $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, implicit-def $al, debug-location !47
+ $esi = MOV32rr killed $ecx, debug-location !46
+ CALL64pcrel32 @printf, csr_64, implicit $rsp, implicit $rdi, implicit $esi, implicit $al, implicit-def $rsp, implicit-def dead $eax, debug-location !46
+ $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !47
+ $rbx = POP64r implicit-def $rsp, implicit $rsp, debug-location !47
+ RETQ $eax, debug-location !47
...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
index c554c04..3748e78 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
@@ -130,32 +130,32 @@
constants:
body: |
bb.0.entry:
- DBG_VALUE debug-use %edi, debug-use _, !21, !DIExpression(), debug-location !25
- DBG_VALUE debug-use %rsi, debug-use _, !22, !DIExpression(), debug-location !26
- %2 = MOV32rm %rip, 1, _, @bar, _, debug-location !27 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 0)`, !tbaa !28)
+ DBG_VALUE debug-use $edi, debug-use _, !21, !DIExpression(), debug-location !25
+ DBG_VALUE debug-use $rsi, debug-use _, !22, !DIExpression(), debug-location !26
+ %2 = MOV32rm $rip, 1, _, @bar, _, debug-location !27 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 0)`, !tbaa !28)
DBG_VALUE debug-use %2, debug-use _, !23, !DIExpression(), debug-location !32
- %3 = MOV32rm %rip, 1, _, @bar + 4, _, debug-location !33 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 1)`, !tbaa !28)
+ %3 = MOV32rm $rip, 1, _, @bar + 4, _, debug-location !33 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 1)`, !tbaa !28)
DBG_VALUE debug-use %3, debug-use _, !24, !DIExpression(), debug-location !34
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !35
- %edi = COPY %2, debug-location !35
- %esi = COPY %3, debug-location !35
- CALL64pcrel32 @foo, csr_64, implicit %rsp, implicit %ssp, implicit killed %edi, implicit killed %esi, implicit-def %rsp, debug-location !35
- ADJCALLSTACKUP64 0, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !35
- %eax = MOV32r0 implicit-def dead %eflags, debug-location !36
- RET 0, killed %eax, debug-location !36
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !35
+ $edi = COPY %2, debug-location !35
+ $esi = COPY %3, debug-location !35
+ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit killed $esi, implicit-def $rsp, debug-location !35
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !35
+ $eax = MOV32r0 implicit-def dead $eflags, debug-location !36
+ RET 0, killed $eax, debug-location !36
...
# Let's verify that the slot index ranges for the unused variables argc/argv,
-# connected to physical regs %edi and %rsi, does not overlap with the ranges
+# connected to physical regs $edi and $rsi, does not overlap with the ranges
# for %2 and %3. The register allocator is actually allocating the
-# virtual registers # to %edi and %esi, so the ranges for argc/argv should
+# virtual registers # to $edi and $esi, so the ranges for argc/argv should
# not cover the whole BB.
#
# CHECKDBG-LABEL: ********** EMITTING LIVE DEBUG VARIABLES **********
-# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=debug-use %edi
+# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=debug-use $edi
# CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B
-# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=debug-use %rsi
+# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=debug-use $rsi
# CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B
# CHECKDBG-NEXT: !"a0,7" [16r;64r):0 Loc0=debug-use %2
# CHECKDBG-NEXT: [16r;64r):0 %bb.0-160B
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
index 8b01f73..912db1f 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
@@ -128,19 +128,19 @@
constants:
body: |
bb.0.entry:
- DBG_VALUE debug-use %edi, debug-use _, !21, !DIExpression(), debug-location !25
- DBG_VALUE debug-use %rsi, debug-use _, !22, !DIExpression(), debug-location !26
- %2 = MOV32rm %rip, 1, _, @bar, _, debug-location !27 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 0)`, !tbaa !28)
+ DBG_VALUE debug-use $edi, debug-use _, !21, !DIExpression(), debug-location !25
+ DBG_VALUE debug-use $rsi, debug-use _, !22, !DIExpression(), debug-location !26
+ %2 = MOV32rm $rip, 1, _, @bar, _, debug-location !27 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 0)`, !tbaa !28)
DBG_VALUE debug-use %2, debug-use _, !23, !DIExpression(), debug-location !32
- %3 = MOV32rm %rip, 1, _, @bar + 4, _, debug-location !33 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 1)`, !tbaa !28)
+ %3 = MOV32rm $rip, 1, _, @bar + 4, _, debug-location !33 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([2 x i32], [2 x i32]* @bar, i64 0, i64 1)`, !tbaa !28)
DBG_VALUE debug-use %3, debug-use _, !24, !DIExpression(), debug-location !34
- ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !35
- %edi = COPY %2, debug-location !35
- %esi = COPY %3, debug-location !35
- CALL64pcrel32 @foo, csr_64, implicit %rsp, implicit %ssp, implicit killed %edi, implicit killed %esi, implicit-def %rsp, debug-location !35
- ADJCALLSTACKUP64 0, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !35
- %eax = MOV32r0 implicit-def dead %eflags, debug-location !36
- RET 0, killed %eax, debug-location !36
+ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !35
+ $edi = COPY %2, debug-location !35
+ $esi = COPY %3, debug-location !35
+ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit killed $esi, implicit-def $rsp, debug-location !35
+ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !35
+ $eax = MOV32r0 implicit-def dead $eflags, debug-location !36
+ RET 0, killed $eax, debug-location !36
...
@@ -150,9 +150,9 @@
# CHECKMIR: ![[ARGV:[0-9]+]] = !DILocalVariable(name: "argv", arg: 2
# CHECKMIR: name: main
# CHECKMIR: body:
-# CHECKMIR: DBG_VALUE debug-use %edi, debug-use %noreg, ![[ARGC]]
-# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use %noreg, ![[ARGC]]
-# CHECKMIR: DBG_VALUE debug-use %rsi, debug-use %noreg, ![[ARGV]]
-# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use %noreg, ![[ARGC]]
-# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use %noreg, ![[ARGV]]
+# CHECKMIR: DBG_VALUE debug-use $edi, debug-use $noreg, ![[ARGC]]
+# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use $noreg, ![[ARGC]]
+# CHECKMIR: DBG_VALUE debug-use $rsi, debug-use $noreg, ![[ARGV]]
+# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use $noreg, ![[ARGC]]
+# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use $noreg, ![[ARGV]]
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
index ce82396..0783ff8 100644
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
@@ -25,13 +25,13 @@
; CHECK: ![[CS3]] = distinct !DILocation(line: 8, column: 3, scope: !{{[0-9]+}})
;
; CHECK: bb.1.if.then:
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
- ; CHECK-NOT: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS2]]
+ ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
+ ; CHECK-NOT: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location
+ ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS2]]
; CHECK: bb.2.if.end:
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
- ; CHECK-NOT: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS3]]
+ ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
+ ; CHECK-NOT: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location
+ ; CHECK: DBG_VALUE debug-use $ebx, debug-use $noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS3]]
;
; ModuleID = 'livedebugvalues-limit.ll'
source_filename = "livedebugvalues-limit.c"
@@ -129,11 +129,11 @@
selected: false
tracksRegLiveness: true
liveins:
- - { reg: '%edi' }
-calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
- '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
- '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
- '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
+ - { reg: '$edi' }
+calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',
+ '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',
+ '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',
+ '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -152,16 +152,16 @@
- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
body: |
bb.0.entry:
- liveins: %edi, %rbp
+ liveins: $edi, $rbp
- frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- CFI_INSTRUCTION offset %rbp, -16
- %rbp = frame-setup MOV64rr %rsp
- CFI_INSTRUCTION def_cfa_register %rbp
- DBG_VALUE debug-use %edi, debug-use _, !12, !13, debug-location !14
- %rbp = POP64r implicit-def %rsp, implicit %rsp, debug-location !15
- TAILJMPd64 @sink, csr_64, implicit %rsp, implicit %rsp, implicit %edi, debug-location !15
+ CFI_INSTRUCTION offset $rbp, -16
+ $rbp = frame-setup MOV64rr $rsp
+ CFI_INSTRUCTION def_cfa_register $rbp
+ DBG_VALUE debug-use $edi, debug-use _, !12, !13, debug-location !14
+ $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !15
+ TAILJMPd64 @sink, csr_64, implicit $rsp, implicit $rsp, implicit $edi, debug-location !15
...
---
@@ -173,11 +173,11 @@
selected: false
tracksRegLiveness: true
liveins:
- - { reg: '%edi' }
-calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
- '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
- '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
- '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
+ - { reg: '$edi' }
+calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',
+ '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',
+ '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',
+ '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -193,47 +193,47 @@
hasVAStart: false
hasMustTailInVarArgFunc: false
fixedStack:
- - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '%rbx' }
+ - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$rbx' }
- { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16 }
body: |
bb.0.entry:
successors: %bb.2.if.end, %bb.1.if.then
- liveins: %edi, %rbx, %rbp
+ liveins: $edi, $rbx, $rbp
- frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+ frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- CFI_INSTRUCTION offset %rbp, -16
- %rbp = frame-setup MOV64rr %rsp
- CFI_INSTRUCTION def_cfa_register %rbp
- frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
- frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
- CFI_INSTRUCTION offset %rbx, -24
- DBG_VALUE debug-use %edi, debug-use _, !19, !13, debug-location !20
- %ebx = MOV32rr %edi
- DBG_VALUE debug-use %ebx, debug-use _, !12, !13, debug-location !21
- DBG_VALUE debug-use %ebx, debug-use _, !19, !13, debug-location !20
- CALL64pcrel32 @sink, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, debug-location !23
- TEST32rr %ebx, %ebx, implicit-def %eflags, debug-location !24
- JE_1 %bb.2.if.end, implicit %eflags
+ CFI_INSTRUCTION offset $rbp, -16
+ $rbp = frame-setup MOV64rr $rsp
+ CFI_INSTRUCTION def_cfa_register $rbp
+ frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
+ CFI_INSTRUCTION offset $rbx, -24
+ DBG_VALUE debug-use $edi, debug-use _, !19, !13, debug-location !20
+ $ebx = MOV32rr $edi
+ DBG_VALUE debug-use $ebx, debug-use _, !12, !13, debug-location !21
+ DBG_VALUE debug-use $ebx, debug-use _, !19, !13, debug-location !20
+ CALL64pcrel32 @sink, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !23
+ TEST32rr $ebx, $ebx, implicit-def $eflags, debug-location !24
+ JE_1 %bb.2.if.end, implicit $eflags
bb.1.if.then:
successors: %bb.2.if.end
- liveins: %ebx, %rbp
+ liveins: $ebx, $rbp
- DBG_VALUE debug-use %ebx, debug-use _, !19, !13, debug-location !20
- DBG_VALUE debug-use %ebx, debug-use _, !12, !13, debug-location !27
- %edi = MOV32rr %ebx, debug-location !29
- CALL64pcrel32 @sink, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, debug-location !29
+ DBG_VALUE debug-use $ebx, debug-use _, !19, !13, debug-location !20
+ DBG_VALUE debug-use $ebx, debug-use _, !12, !13, debug-location !27
+ $edi = MOV32rr $ebx, debug-location !29
+ CALL64pcrel32 @sink, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp, debug-location !29
bb.2.if.end:
- liveins: %ebx, %rbp
+ liveins: $ebx, $rbp
- DBG_VALUE debug-use %ebx, debug-use _, !19, !13, debug-location !20
- %edi = MOV32rr killed %ebx, debug-location !33
- %rsp = ADD64ri8 %rsp, 8, implicit-def dead %eflags, debug-location !33
- DBG_VALUE debug-use %ebx, debug-use _, !12, !13, debug-location !31
- %rbx = POP64r implicit-def %rsp, implicit %rsp, debug-location !33
- %rbp = POP64r implicit-def %rsp, implicit %rsp, debug-location !33
- TAILJMPd64 @sink, csr_64, implicit %rsp, implicit %rsp, implicit %edi, debug-location !33
+ DBG_VALUE debug-use $ebx, debug-use _, !19, !13, debug-location !20
+ $edi = MOV32rr killed $ebx, debug-location !33
+ $rsp = ADD64ri8 $rsp, 8, implicit-def dead $eflags, debug-location !33
+ DBG_VALUE debug-use $ebx, debug-use _, !12, !13, debug-location !31
+ $rbx = POP64r implicit-def $rsp, implicit $rsp, debug-location !33
+ $rbp = POP64r implicit-def $rsp, implicit $rsp, debug-location !33
+ TAILJMPd64 @sink, csr_64, implicit $rsp, implicit $rsp, implicit $edi, debug-location !33
...
diff --git a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir
index 2e7af34..a86a48c 100644
--- a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir
+++ b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir
@@ -18,7 +18,7 @@
; out of a loop the debug information is not retained.
;
; CHECK-LABEL: bb.0.entry:
- ; CHECK: MOV64rm %rip, 1, %noreg, target-flags(x86-gotpcrel) @x, %noreg :: (load 8 from got)
+ ; CHECK: MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @x, $noreg :: (load 8 from got)
; CHECK-LABEL: bb.1.while.body:
;
; ModuleID = 'tx.ll'
@@ -102,7 +102,7 @@
- { id: 3, class: gr32 }
- { id: 4, class: gr64 }
liveins:
- - { reg: '%rdi', virtual-reg: '%2' }
+ - { reg: '$rdi', virtual-reg: '%2' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -120,10 +120,10 @@
body: |
bb.0.entry:
successors: %bb.1.while.body(0x80000000)
- liveins: %rdi
+ liveins: $rdi
- DBG_VALUE debug-use %rdi, debug-use _, !16, !17, debug-location !18
- %2 = COPY %rdi
+ DBG_VALUE debug-use $rdi, debug-use _, !16, !17, debug-location !18
+ %2 = COPY $rdi
DBG_VALUE debug-use %2, debug-use _, !16, !17, debug-location !18
bb.1.while.body:
@@ -131,10 +131,10 @@
%0 = PHI %2, %bb.0.entry, %1, %bb.1.while.body
DBG_VALUE debug-use %0, debug-use _, !16, !17, debug-location !18
- %1 = ADD64ri8 %0, 4, implicit-def dead %eflags, debug-location !20
+ %1 = ADD64ri8 %0, 4, implicit-def dead $eflags, debug-location !20
DBG_VALUE debug-use %1, debug-use _, !16, !17, debug-location !18
%3 = MOV32rm %0, 1, _, 0, _, debug-location !21 :: (load 4 from %ir.p.addr.0, !tbaa !22)
- %4 = MOV64rm %rip, 1, _, target-flags(x86-gotpcrel) @x, _, debug-location !26 :: (load 8 from got)
+ %4 = MOV64rm $rip, 1, _, target-flags(x86-gotpcrel) @x, _, debug-location !26 :: (load 8 from got)
MOV32mr killed %4, 1, _, 0, _, killed %3, debug-location !26 :: (store 4 into @x, !tbaa !22)
JMP_1 %bb.1.while.body, debug-location !27
diff --git a/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir b/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
index 4ea8459..09b24e1 100644
--- a/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
+++ b/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
@@ -48,10 +48,10 @@
regBankSelected: false
selected: false
tracksRegLiveness: true
-calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
- '%rbp', '%rbx', '%r12', '%r13', '%r14', '%r15',
- '%r12b', '%r13b', '%r14b', '%r15b', '%r12d', '%r13d',
- '%r14d', '%r15d', '%r12w', '%r13w', '%r14w', '%r15w' ]
+calleeSavedRegisters: [ '$bh', '$bl', '$bp', '$bpl', '$bx', '$ebp', '$ebx',
+ '$rbp', '$rbx', '$r12', '$r13', '$r14', '$r15',
+ '$r12b', '$r13b', '$r14b', '$r15b', '$r12d', '$r13d',
+ '$r14d', '$r15d', '$r12w', '$r13w', '$r14w', '$r15w' ]
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -68,10 +68,10 @@
hasMustTailInVarArgFunc: false
body: |
bb.0.entry:
- frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp, debug-location !8
+ frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp, debug-location !8
CFI_INSTRUCTION def_cfa_offset 16
- CALL64pcrel32 @bar, csr_64, implicit %rsp, implicit-def %rsp, debug-location !8
- %rax = POP64r implicit-def %rsp, implicit %rsp, debug-location !9
+ CALL64pcrel32 @bar, csr_64, implicit $rsp, implicit-def $rsp, debug-location !8
+ $rax = POP64r implicit-def $rsp, implicit $rsp, debug-location !9
RET 0, debug-location !9
...
diff --git a/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir b/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
index cca9266..0d290c3 100644
--- a/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
+++ b/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
@@ -39,12 +39,12 @@
- { id: 0, class: gr32, preferred-register: '' }
body: |
bb.0.entry:
- %0 = MOV32r0 implicit-def dead %eflags, debug-location !19
+ %0 = MOV32r0 implicit-def dead $eflags, debug-location !19
DBG_VALUE debug-use %0, debug-use _, !18, !DIExpression(), debug-location !20
- %eax = COPY killed %0, debug-location !21
- RET 0, killed %eax, debug-location !21
+ $eax = COPY killed %0, debug-location !21
+ RET 0, killed $eax, debug-location !21
...
-# CHECK: %eax = MOV32r0
-# CHECK-NEXT: DBG_VALUE debug-use %eax
+# CHECK: $eax = MOV32r0
+# CHECK-NEXT: DBG_VALUE debug-use $eax
diff --git a/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll b/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll
index fa52d9d..6dee115 100644
--- a/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll
+++ b/llvm/test/DebugInfo/MSP430/sdagsplit-1.ll
@@ -13,10 +13,10 @@
; return 0;
; }
;
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 16), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 48, 16), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 16), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 16, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 48, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use $r{{[0-9]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 16, 16), debug-location !{{[0-9]+}}
; ModuleID = 'sdagsplit-1.c'
target datalayout = "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16"
diff --git a/llvm/test/DebugInfo/X86/bbjoin.ll b/llvm/test/DebugInfo/X86/bbjoin.ll
index c3efdef..1c1c956 100644
--- a/llvm/test/DebugInfo/X86/bbjoin.ll
+++ b/llvm/test/DebugInfo/X86/bbjoin.ll
@@ -11,13 +11,13 @@
; }
; CHECK: ![[X:.*]] = !DILocalVariable(name: "x",
; CHECK: bb.0.entry:
-; CHECK: DBG_VALUE 23, debug-use %noreg, ![[X]],
-; CHECK: DBG_VALUE %rsp, 0, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref),
+; CHECK: DBG_VALUE 23, debug-use $noreg, ![[X]],
+; CHECK: DBG_VALUE $rsp, 0, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref),
; CHECK: bb.1.if.then:
-; CHECK: DBG_VALUE 43, debug-use %noreg, ![[X]],
+; CHECK: DBG_VALUE 43, debug-use $noreg, ![[X]],
; CHECK: bb.2.if.end:
-; CHECK-NOT: DBG_VALUE 23, debug-use %noreg, ![[X]],
-; CHECK: RETQ %eax
+; CHECK-NOT: DBG_VALUE 23, debug-use $noreg, ![[X]],
+; CHECK: RETQ $eax
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.11.0"
diff --git a/llvm/test/DebugInfo/X86/dbg-addr-dse.ll b/llvm/test/DebugInfo/X86/dbg-addr-dse.ll
index 3fc66d9..0d27655 100644
--- a/llvm/test/DebugInfo/X86/dbg-addr-dse.ll
+++ b/llvm/test/DebugInfo/X86/dbg-addr-dse.ll
@@ -47,12 +47,12 @@
; ASM-LABEL: f: # @f
; ASM: movl %ecx, [[OFF_X:[0-9]+]](%rsp)
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
; ASM: callq escape
; ASM: #DEBUG_VALUE: f:x <- 1
; ASM: movl $1, global(%rip)
; FIXME: Needs a fix to LiveDebugVariables
-; ASMX: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
+; ASMX: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
; ASM: movl $2, [[OFF_X]](%rsp)
; ASM: callq escape
; ASM: retq
diff --git a/llvm/test/DebugInfo/X86/dbg-addr.ll b/llvm/test/DebugInfo/X86/dbg-addr.ll
index 4b30622..571b7d0 100644
--- a/llvm/test/DebugInfo/X86/dbg-addr.ll
+++ b/llvm/test/DebugInfo/X86/dbg-addr.ll
@@ -7,7 +7,7 @@
; is control-dependent.
; CHECK-LABEL: use_dbg_addr:
-; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [%rsp+0]
+; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [$rsp+0]
; FIXME: Avoid the use of a single-location location list and use
; DW_AT_start_offset instead.
diff --git a/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll b/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
index 5223797..e8b177d 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
@@ -8,8 +8,8 @@
; CHECK-LABEL: __OpenCL_test_kernel:
; CHECK-DAG: ##DEBUG_VALUE: __OpenCL_test_kernel:ip <-
; CHECK-DAG: ##DEBUG_VALUE: xxx <- 0
-; CHECK-DAG: ##DEBUG_VALUE: gid <- %e{{..$}}
-; CHECK-DAG: ##DEBUG_VALUE: idx <- %e{{..$}}
+; CHECK-DAG: ##DEBUG_VALUE: gid <- $e{{..$}}
+; CHECK-DAG: ##DEBUG_VALUE: idx <- $e{{..$}}
; CHECK-NOT: ##DEBUG_VALUE:
declare <4 x i32> @__amdil_get_global_id_int()
diff --git a/llvm/test/DebugInfo/X86/dbg-value-frame-index.ll b/llvm/test/DebugInfo/X86/dbg-value-frame-index.ll
index a0e2d21..b411f20 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-frame-index.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-frame-index.ll
@@ -20,7 +20,7 @@
}
; CHECK-LABEL: test
-; CHECK: #DEBUG_VALUE: test:w <- [DW_OP_plus_uconst 8] [%rsp+0]
+; CHECK: #DEBUG_VALUE: test:w <- [DW_OP_plus_uconst 8] [$rsp+0]
; DWARF: DW_AT_location [DW_FORM_sec_offset] (
; DWARF-NEXT: [{{.*}}, {{.*}}): DW_OP_breg7 RSP+8)
diff --git a/llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll b/llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
index 72559bf..e8e13de 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
@@ -5,7 +5,7 @@
; of individual register def operands.
; ASM: main: # @main
-; ASM: #DEBUG_VALUE: main:argc <- %ecx
+; ASM: #DEBUG_VALUE: main:argc <- $ecx
; ASM: movl $1, x(%rip)
; ASM: callq clobber
; ASM-NEXT: [[argc_range_end:.Ltmp[0-9]+]]:
diff --git a/llvm/test/DebugInfo/X86/dbg-value-transfer-order.ll b/llvm/test/DebugInfo/X86/dbg-value-transfer-order.ll
index 7ef9946..2c822a6 100644
--- a/llvm/test/DebugInfo/X86/dbg-value-transfer-order.ll
+++ b/llvm/test/DebugInfo/X86/dbg-value-transfer-order.ll
@@ -33,7 +33,7 @@
; CHECK: movl %eax, %ecx
; CHECK: .LBB0_3: # %if.end
; Check that this DEBUG_VALUE comes before the left shift.
-; CHECK: #DEBUG_VALUE: bit_offset <- %ecx
+; CHECK: #DEBUG_VALUE: bit_offset <- $ecx
; CHECK: .cv_loc 0 1 8 28 # t.c:8:28
; CHECK: movl $1, %[[reg:[^ ]*]]
; CHECK: shll %cl, %[[reg]]
diff --git a/llvm/test/DebugInfo/X86/debug-loc-asan.ll b/llvm/test/DebugInfo/X86/debug-loc-asan.ll
index ca7e100..2bdc176 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-asan.ll
+++ b/llvm/test/DebugInfo/X86/debug-loc-asan.ll
@@ -14,7 +14,7 @@
; The address of the (potentially now malloc'ed) alloca ends up
; in rdi, after which it is spilled to the stack. We record the
; spill OFFSET on the stack for checking the debug info below.
-; CHECK: #DEBUG_VALUE: bar:y <- [DW_OP_deref] [%rdi+0]
+; CHECK: #DEBUG_VALUE: bar:y <- [DW_OP_deref] [$rdi+0]
; CHECK: movq %rdi, [[OFFSET:[0-9]+]](%rsp)
; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
; CHECK-NEXT: #DEBUG_VALUE: bar:y <- [DW_OP_plus_uconst [[OFFSET]], DW_OP_deref, DW_OP_deref]
diff --git a/llvm/test/DebugInfo/X86/live-debug-values.ll b/llvm/test/DebugInfo/X86/live-debug-values.ll
index ac6c7c4..91c3256 100644
--- a/llvm/test/DebugInfo/X86/live-debug-values.ll
+++ b/llvm/test/DebugInfo/X86/live-debug-values.ll
@@ -30,7 +30,7 @@
; DBG_VALUE for variable "n" is extended into %bb.5 from its predecessors %bb.3
; and %bb.4.
; CHECK: .LBB0_5:
-; CHECK-NEXT: #DEBUG_VALUE: main:n <- %ebx
+; CHECK-NEXT: #DEBUG_VALUE: main:n <- $ebx
; Other register values have been clobbered.
; CHECK-NOT: #DEBUG_VALUE:
; CHECK: movl %ecx, m(%rip)
diff --git a/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir b/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
index b4a79c87..eae53c2 100644
--- a/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
+++ b/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
@@ -13,12 +13,12 @@
# CHECK-LABEL: f: # @f
# CHECK: movl %ecx, [[OFF_X:[0-9]+]](%rsp)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
# CHECK: leaq [[OFF_X]](%rsp), %rsi
# CHECK: callq escape
# CHECK: #DEBUG_VALUE: f:x <- 1
# CHECK: movl $1, global(%rip)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [%rsp+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
# CHECK: movl $2, [[OFF_X]](%rsp)
# CHECK: callq escape
# CHECK: retq
@@ -98,7 +98,7 @@
- { id: 0, class: gr32, preferred-register: '' }
- { id: 1, class: gr64, preferred-register: '' }
liveins:
- - { reg: '%ecx', virtual-reg: '%0' }
+ - { reg: '$ecx', virtual-reg: '%0' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
@@ -124,24 +124,24 @@
constants:
body: |
bb.0.entry:
- liveins: %ecx
+ liveins: $ecx
- %0 = COPY %ecx
+ %0 = COPY $ecx
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0 :: (store 4 into %ir.x.addr)
DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !14
- ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !15
+ ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15
%1 = LEA64r %stack.0.x.addr, 1, _, 0, _
- %rcx = COPY %1, debug-location !15
- CALL64pcrel32 @escape, csr_win64, implicit %rsp, implicit %ssp, implicit %rcx, implicit-def %rsp, implicit-def %ssp, debug-location !15
- ADJCALLSTACKUP64 32, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !15
+ $rcx = COPY %1, debug-location !15
+ CALL64pcrel32 @escape, csr_win64, implicit $rsp, implicit $ssp, implicit $rcx, implicit-def $rsp, implicit-def $ssp, debug-location !15
+ ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15
DBG_VALUE 1, debug-use _, !13, !DIExpression(), debug-location !16
- MOV32mi %rip, 1, _, @global, _, 1, debug-location !17 :: (store 4 into @global)
+ MOV32mi $rip, 1, _, @global, _, 1, debug-location !17 :: (store 4 into @global)
DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !18
MOV32mi %stack.0.x.addr, 1, _, 0, _, 2, debug-location !18 :: (store 4 into %ir.x.addr)
- ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !19
- %rcx = COPY %1, debug-location !19
- CALL64pcrel32 @escape, csr_win64, implicit %rsp, implicit %ssp, implicit %rcx, implicit-def %rsp, implicit-def %ssp, debug-location !19
- ADJCALLSTACKUP64 32, 0, implicit-def dead %rsp, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp, debug-location !19
+ ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !19
+ $rcx = COPY %1, debug-location !19
+ CALL64pcrel32 @escape, csr_win64, implicit $rsp, implicit $ssp, implicit $rcx, implicit-def $rsp, implicit-def $ssp, debug-location !19
+ ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !19
RET 0, debug-location !20
...
diff --git a/llvm/test/DebugInfo/X86/op_deref.ll b/llvm/test/DebugInfo/X86/op_deref.ll
index c2a42f4..af04b75c 100644
--- a/llvm/test/DebugInfo/X86/op_deref.ll
+++ b/llvm/test/DebugInfo/X86/op_deref.ll
@@ -17,7 +17,7 @@
; Check the DEBUG_VALUE comments for good measure.
; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
; vla should have a register-indirect address at one point.
-; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] [%rcx+0]
+; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] [$rcx+0]
; ASM-CHECK: DW_OP_breg2
; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s --check-prefix=PRETTY-PRINT
diff --git a/llvm/test/DebugInfo/X86/pieces-4.ll b/llvm/test/DebugInfo/X86/pieces-4.ll
index 1840e66..06a32f4 100644
--- a/llvm/test/DebugInfo/X86/pieces-4.ll
+++ b/llvm/test/DebugInfo/X86/pieces-4.ll
@@ -17,7 +17,7 @@
; CHECK: callq g
; CHECK: movl %eax, [[offs:[0-9]+]](%rsp) # 4-byte Spill
; CHECK: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_LLVM_fragment 32 32] 0
-; CHECK: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offs]], DW_OP_LLVM_fragment 0 32] [%rsp+0]
+; CHECK: #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_plus_uconst [[offs]], DW_OP_LLVM_fragment 0 32] [$rsp+0]
; CHECK: #APP
; CHECK: #NO_APP
; CHECK: movl [[offs]](%rsp), %eax # 4-byte Reload
diff --git a/llvm/test/DebugInfo/X86/pr34545.ll b/llvm/test/DebugInfo/X86/pr34545.ll
index 07e80f4..7baef1f 100644
--- a/llvm/test/DebugInfo/X86/pr34545.ll
+++ b/llvm/test/DebugInfo/X86/pr34545.ll
@@ -1,14 +1,14 @@
; RUN: llc -O1 -filetype=asm -mtriple x86_64-unknown-linux-gnu -mcpu=x86-64 -o - %s -stop-after=livedebugvars | FileCheck %s
-; CHECK: %eax = MOV32rm
-; CHECK: DBG_VALUE %eax
-; CHECK: %eax = SHL32rCL killed renamable %eax
-; CHECK: DBG_VALUE %eax
-; CHECK: DBG_VALUE %rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
-; CHECK: DBG_VALUE %eax
-; CHECK: %eax = SHL32rCL killed renamable %eax
-; CHECK: DBG_VALUE %eax
-; CHECK: RETQ %eax
+; CHECK: $eax = MOV32rm
+; CHECK: DBG_VALUE $eax
+; CHECK: $eax = SHL32rCL killed renamable $eax
+; CHECK: DBG_VALUE $eax
+; CHECK: DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
+; CHECK: DBG_VALUE $eax
+; CHECK: $eax = SHL32rCL killed renamable $eax
+; CHECK: DBG_VALUE $eax
+; CHECK: RETQ $eax
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/DebugInfo/X86/sdag-combine.ll b/llvm/test/DebugInfo/X86/sdag-combine.ll
index 0fb809e..e8ee774 100644
--- a/llvm/test/DebugInfo/X86/sdag-combine.ll
+++ b/llvm/test/DebugInfo/X86/sdag-combine.ll
@@ -15,7 +15,7 @@
entry:
%0 = alloca %TSb, align 1
%1 = call swiftcc i1 @f(), !dbg !7
- ; CHECK: DBG_VALUE debug-use %rax, debug-use %noreg, !8, !DIExpression(), debug-location !7
+ ; CHECK: DBG_VALUE debug-use $rax, debug-use $noreg, !8, !DIExpression(), debug-location !7
call void @llvm.dbg.value(metadata i1 %1, metadata !8, metadata !DIExpression()), !dbg !7
%2 = getelementptr inbounds %TSb, %TSb* %0, i32 0, i32 0, !dbg !7
store i1 %1, i1* %2, align 1, !dbg !7
diff --git a/llvm/test/DebugInfo/X86/sdag-salvage-add.ll b/llvm/test/DebugInfo/X86/sdag-salvage-add.ll
index 1b1f86f1..2adea89 100644
--- a/llvm/test/DebugInfo/X86/sdag-salvage-add.ll
+++ b/llvm/test/DebugInfo/X86/sdag-salvage-add.ll
@@ -24,11 +24,11 @@
;
; CHECK: ![[S4:.*]] = !DILocalVariable(name: "s4",
; CHECK: ![[MYVAR:.*]] = !DILocalVariable(name: "myVar",
-; CHECK: DBG_VALUE debug-use %rax, debug-use %noreg, ![[MYVAR]],
+; CHECK: DBG_VALUE debug-use $rax, debug-use $noreg, ![[MYVAR]],
; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
-; CHECK-NEXT: DBG_VALUE debug-use %rax, debug-use %noreg, ![[S4]],
+; CHECK-NEXT: DBG_VALUE debug-use $rax, debug-use $noreg, ![[S4]],
; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
-; CHECK-NEXT: %rdi = MOV64rm killed renamable %rax, 1, %noreg, 4096, %noreg,
+; CHECK-NEXT: $rdi = MOV64rm killed renamable $rax, 1, $noreg, 4096, $noreg,
source_filename = "test.c"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/DebugInfo/X86/sdag-split-arg.ll b/llvm/test/DebugInfo/X86/sdag-split-arg.ll
index 790b482..e5904e1 100644
--- a/llvm/test/DebugInfo/X86/sdag-split-arg.ll
+++ b/llvm/test/DebugInfo/X86/sdag-split-arg.ll
@@ -1,10 +1,10 @@
; RUN: llc -O0 -filetype=asm %s -o - | FileCheck %s
; Test large integral function arguments passed in multiple registers.
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 64 16] %ax
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 48 16] %r9w
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 32 16] %r10w
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 16 16] %r11w
-; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 0 16] %bx
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 64 16] $ax
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 48 16] $r9w
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 32 16] $r10w
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 16 16] $r11w
+; CHECK: DEBUG_VALUE: foo:bar <- [DW_OP_LLVM_fragment 0 16] $bx
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/DebugInfo/X86/sdagsplit-1.ll b/llvm/test/DebugInfo/X86/sdagsplit-1.ll
index 5e3cbdb..ac32958 100644
--- a/llvm/test/DebugInfo/X86/sdagsplit-1.ll
+++ b/llvm/test/DebugInfo/X86/sdagsplit-1.ll
@@ -13,8 +13,8 @@
; return 0;
; }
;
-; CHECK-DAG: DBG_VALUE debug-use %{{[a-z]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %{{[a-z]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use ${{[a-z]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use ${{[a-z]+}}, debug-use $noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !{{[0-9]+}}
; ModuleID = 'sdagsplit-1.c'
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
diff --git a/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll b/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
index 939045c..929a787 100644
--- a/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
+++ b/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
@@ -21,9 +21,9 @@
; }
; CHECK-LABEL: _Z10get_stringv:
-; CHECK: #DEBUG_VALUE: get_string:result <- [%rdi+0]
+; CHECK: #DEBUG_VALUE: get_string:result <- [$rdi+0]
; CHECK: movq %rdi, [[OFFS:[0-9]+]](%rsp) # 8-byte Spill
-; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [%rsp+0]
+; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [$rsp+0]
; CHECK: callq _ZN6stringC1Ei
; CHECK: #APP
; CHECK: #NO_APP
diff --git a/llvm/test/DebugInfo/X86/spill-nontrivial-param.ll b/llvm/test/DebugInfo/X86/spill-nontrivial-param.ll
index 223da4f..e7a61e7 100644
--- a/llvm/test/DebugInfo/X86/spill-nontrivial-param.ll
+++ b/llvm/test/DebugInfo/X86/spill-nontrivial-param.ll
@@ -20,9 +20,9 @@
; }
; CHECK-LABEL: _Z3foo10NonTrivial:
-; CHECK: #DEBUG_VALUE: foo:nt <- [%rdi+0]
+; CHECK: #DEBUG_VALUE: foo:nt <- [$rdi+0]
; CHECK: movq %rdi, -8(%rsp) # 8-byte Spill
-; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [%rsp+0]
+; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [$rsp+0]
; CHECK: #APP
; CHECK: #NO_APP
; CHECK: movq -8(%rsp), %rax # 8-byte Reload
diff --git a/llvm/test/DebugInfo/X86/spill-nospill.ll b/llvm/test/DebugInfo/X86/spill-nospill.ll
index c0924a4..4ba8d4a 100644
--- a/llvm/test/DebugInfo/X86/spill-nospill.ll
+++ b/llvm/test/DebugInfo/X86/spill-nospill.ll
@@ -24,12 +24,12 @@
; CHECK-LABEL: f: # @f
; CHECK: callq g
; CHECK: movl %eax, [[X_OFFS:[0-9]+]](%rsp) # 4-byte Spill
-; CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[X_OFFS]]] [%rsp+0]
+; CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[X_OFFS]]] [$rsp+0]
; CHECK: #APP
; CHECK: #NO_APP
; CHECK: callq g
; CHECK: movl %eax, %[[CSR:[^ ]*]]
-; CHECK: #DEBUG_VALUE: f:y <- %esi
+; CHECK: #DEBUG_VALUE: f:y <- $esi
; CHECK: movl %[[CSR]], %ecx
; CHECK: callq g
; CHECK: movl %[[CSR]], %ecx
@@ -37,7 +37,7 @@
; CHECK: movl %[[CSR]], %ecx
; CHECK: callq g
; CHECK: movl [[X_OFFS]](%rsp), %eax # 4-byte Reload
-; CHECK: #DEBUG_VALUE: f:x <- %eax
+; CHECK: #DEBUG_VALUE: f:x <- $eax
; CHECK: addl %[[CSR]], %eax
; DWARF: DW_TAG_variable
diff --git a/llvm/test/DebugInfo/X86/vla.ll b/llvm/test/DebugInfo/X86/vla.ll
index b86b172..62bca89 100644
--- a/llvm/test/DebugInfo/X86/vla.ll
+++ b/llvm/test/DebugInfo/X86/vla.ll
@@ -1,6 +1,6 @@
; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
; Ensure that we generate an indirect location for the variable length array a.
-; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] [%rcx+0]
+; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] [$rcx+0]
; CHECK: DW_OP_breg2
; rdar://problem/13658587
;