diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
index 1cb07f1..6cba016 100644
--- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1819,6 +1819,7 @@
       Tmp2 = SelectExpr(N.getOperand(1));
       BuildMI(BB, DestType == MVT::f64 ? Alpha::DIVT : Alpha::DIVS, 2, Result)
         .addReg(Tmp1).addReg(Tmp2);
+      return Result;
     } else {
       ConstantSDNode* CSD;
       //check if we can convert into a shift!