commit | 446dbcb5e465973ab9a3b00683fe0cc84c66b03b | [log] [tgz] |
---|---|---|
author | Andrew Lenharth <andrewl@lenharth.org> | Wed May 17 19:24:31 2006 +0000 |
committer | Andrew Lenharth <andrewl@lenharth.org> | Wed May 17 19:24:31 2006 +0000 |
tree | 412be67ccc35b458f7debac82a3dcfbc1b19ec1a | |
parent | f8e448f06fffbe5781ef55becd630b4c33244baa [diff] [blame] |
Added sanity check for obviously bogus immediates llvm-svn: 28359
diff --git a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp index 8c597e4..7b446a4 100644 --- a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp +++ b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -82,6 +82,7 @@ O << TM.getRegisterInfo()->get(MO.getReg()).Name; } else if (MO.isImmediate()) { O << MO.getImmedValue(); + assert(MO.getImmedValue() < (1 << 30)); } else { printOp(MO); }