commit 45863cc2029f986d7b2ec3d04ff41a209e9393d4
author Dan Gohman <gohman@apple.com> Fri Jul 20 16:31:26 2007 +0000
committer Dan Gohman <gohman@apple.com> Fri Jul 20 16:31:26 2007 +0000
tree 5e44096575e8180c6f60030076d94c78b59fd076
parent 4b9cedcea5902be87d38b28dbd318d1bcff6aad0

Update these regression tests to accomodate X86InstrSSE.td now using movups/movaps
for everything.

llvm-svn: 40101

llvm/test/CodeGen/X86/sse-align-10.ll

diff --git a/llvm/test/CodeGen/X86/sse-align-10.ll b/llvm/test/CodeGen/X86/sse-align-10.ll
index e94c090..6f2ffc4 100644
--- a/llvm/test/CodeGen/X86/sse-align-10.ll
+++ b/llvm/test/CodeGen/X86/sse-align-10.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1
 
 define <2 x i64> @bar(<2 x i64>* %p)
 {

llvm/test/CodeGen/X86/sse-align-5.ll

diff --git a/llvm/test/CodeGen/X86/sse-align-5.ll b/llvm/test/CodeGen/X86/sse-align-5.ll
index 48c568b..de08d13 100644
--- a/llvm/test/CodeGen/X86/sse-align-5.ll
+++ b/llvm/test/CodeGen/X86/sse-align-5.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqa | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | wc -l | grep 1
 
 define <2 x i64> @bar(<2 x i64>* %p)
 {

llvm/test/CodeGen/X86/sse-align-6.ll

diff --git a/llvm/test/CodeGen/X86/sse-align-6.ll b/llvm/test/CodeGen/X86/sse-align-6.ll
index 9b1b781..9072968 100644
--- a/llvm/test/CodeGen/X86/sse-align-6.ll
+++ b/llvm/test/CodeGen/X86/sse-align-6.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1
 
 define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x)
 {

llvm/test/CodeGen/X86/sse-align-7.ll

diff --git a/llvm/test/CodeGen/X86/sse-align-7.ll b/llvm/test/CodeGen/X86/sse-align-7.ll
index 04b013c..d1762e0e 100644
--- a/llvm/test/CodeGen/X86/sse-align-7.ll
+++ b/llvm/test/CodeGen/X86/sse-align-7.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqa | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | wc -l | grep 1
 
 define void @bar(<2 x i64>* %p, <2 x i64> %x)
 {

llvm/test/CodeGen/X86/sse-align-8.ll

diff --git a/llvm/test/CodeGen/X86/sse-align-8.ll b/llvm/test/CodeGen/X86/sse-align-8.ll
index 14fc76c..f9d1814 100644
--- a/llvm/test/CodeGen/X86/sse-align-8.ll
+++ b/llvm/test/CodeGen/X86/sse-align-8.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1
 
 define void @bar(<2 x i64>* %p, <2 x i64> %x)
 {

llvm/test/CodeGen/X86/vec_call.ll

diff --git a/llvm/test/CodeGen/X86/vec_call.ll b/llvm/test/CodeGen/X86/vec_call.ll
index 990f20f..9531539 100644
--- a/llvm/test/CodeGen/X86/vec_call.ll
+++ b/llvm/test/CodeGen/X86/vec_call.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
 ; RUN:   grep {subl.*60}
 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
-; RUN:   grep {movdqa.*32}
+; RUN:   grep {movaps.*32}
 
 void %test() {
 	tail call void %xx( int 1, int 2, int 3, int 4, int 5, int 6, int 7, <2 x long> cast (<4 x int> < int 4, int 3, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 7, int 6, int 5 > to <2 x long>), <2 x long> cast (<4 x int> < int 6, int 4, int 2, int 0 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 4, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 0, int 1, int 3, int 9 > to <2 x long>) )