commit 4635915504b7f998962f1cb96ea16d2f2996bd47
author Matt Arsenault <Matthew.Arsenault@amd.com> Sat Aug 08 00:41:48 2015 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Sat Aug 08 00:41:48 2015 +0000
tree df3100a367e4749a11d734979ff73694f3bc2a08
parent 6942d1a034ca52cb5f18f69a646b042413b400c0

AMDGPU/SI: Remove VCCReg

llvm-svn: 244380

llvm/lib/Target/AMDGPU/SIInstrFormats.td

diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
index c0b3b51..d056212f 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td
@@ -100,11 +100,11 @@
 }
 
 class VOPCCommon <dag ins, string asm, list<dag> pattern> :
-    VOPAnyCommon <(outs VCCReg:$dst), ins, asm, pattern> {
+    VOPAnyCommon <(outs), ins, asm, pattern> {
 
-  let DisableEncoding = "$dst";
   let VOPC = 1;
   let Size = 4;
+  let Defs = [VCC];
 }
 
 class VOP1Common <dag outs, dag ins, string asm, list<dag> pattern> :