AMDGPU: Make some scalar instructions commutable
llvm-svn: 280784
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index 460bb4d..5a8e2a1 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -296,6 +296,8 @@
[(set i32:$sdst, (sube (i32 SSrc_32:$src0), (i32 SSrc_32:$src1)))]>;
} // End Uses = [SCC]
+
+let isCommutable = 1 in {
def S_MIN_I32 : SOP2_32 <"s_min_i32",
[(set i32:$sdst, (smin i32:$src0, i32:$src1))]
>;
@@ -308,6 +310,7 @@
def S_MAX_U32 : SOP2_32 <"s_max_u32",
[(set i32:$sdst, (umax i32:$src0, i32:$src1))]
>;
+} // End isCommutable = 1
} // End Defs = [SCC]
@@ -317,6 +320,7 @@
} // End Uses = [SCC]
let Defs = [SCC] in {
+let isCommutable = 1 in {
def S_AND_B32 : SOP2_32 <"s_and_b32",
[(set i32:$sdst, (and i32:$src0, i32:$src1))]
>;
@@ -340,6 +344,8 @@
def S_XOR_B64 : SOP2_64 <"s_xor_b64",
[(set i64:$sdst, (xor i64:$src0, i64:$src1))]
>;
+} // End isCommutable = 1
+
def S_ANDN2_B32 : SOP2_32 <"s_andn2_b32">;
def S_ANDN2_B64 : SOP2_64 <"s_andn2_b64">;
def S_ORN2_B32 : SOP2_32 <"s_orn2_b32">;
@@ -380,8 +386,9 @@
[(set i32:$sdst, (AMDGPUbfm i32:$src0, i32:$src1))]>;
def S_BFM_B64 : SOP2_64_32_32 <"s_bfm_b64">;
def S_MUL_I32 : SOP2_32 <"s_mul_i32",
- [(set i32:$sdst, (mul i32:$src0, i32:$src1))]
->;
+ [(set i32:$sdst, (mul i32:$src0, i32:$src1))]> {
+ let isCommutable = 1;
+}
} // End AddedComplexity = 1