add even more missing tests for simplifySelectBitTest()
llvm-svn: 276024
diff --git a/llvm/test/Transforms/InstSimplify/select.ll b/llvm/test/Transforms/InstSimplify/select.ll
index 46e79a2..adc9392 100644
--- a/llvm/test/Transforms/InstSimplify/select.ll
+++ b/llvm/test/Transforms/InstSimplify/select.ll
@@ -127,40 +127,111 @@
%and = and i32 %x, 8
%cmp = icmp eq i32 %and, 0
%or = or i32 %x, 8
- %or.x = select i1 %cmp, i32 %or, i32 %x
- ret i32 %or.x
+ %sel = select i1 %cmp, i32 %or, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_eq_0_or_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8_alt(
+; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 8
+; CHECK-NEXT: ret i32 [[OR]]
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %or = or i32 %x, 8
+ %sel = select i1 %cmp, i32 %x, i32 %or
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_or_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %or = or i32 %x, 8
+ %sel = select i1 %cmp, i32 %or, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_or_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8_alt(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp eq i32 %and, 0
+ %or = or i32 %x, 8
+ %sel = select i1 %cmp, i32 %x, i32 %or
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
+; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
+; CHECK-NEXT: ret i32 [[AND1]]
+;
+ %and = and i32 %x, 8
+ %cmp = icmp eq i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %x, i32 %and1
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_eq_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8_alt(
+; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
+; CHECK-NEXT: ret i32 [[AND1]]
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %and1, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp ne i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %x, i32 %and1
+ ret i32 %sel
+}
+
+define i32 @select_icmp_and_8_ne_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8_alt(
+; CHECK-NEXT: ret i32 %x
+;
+ %and = and i32 %x, 8
+ %cmp = icmp eq i32 %and, 0
+ %and1 = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %and1, i32 %x
+ ret i32 %sel
}
; PR28466: https://llvm.org/bugs/show_bug.cgi?id=28466
+; Each of the previous 8 patterns has a variant that replaces the
+; 'and' with a 'trunc' and the icmp eq/ne with icmp slt/sgt.
-define i32 @select_icmp_trunc_8_eq_0_or_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_8(
+define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128(
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TRUNC]], -1
; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 %x
; CHECK-NEXT: ret i32 [[SEL]]
;
%trunc = trunc i32 %x to i8
- %cmp = icmp slt i8 %trunc, 0
+ %cmp = icmp sgt i8 %trunc, -1
%or = or i32 %x, 128
%sel = select i1 %cmp, i32 %or, i32 %x
ret i32 %sel
}
-define i32 @select_icmp_and_8_ne_0_or_128(i32 %x) {
-; CHECK-LABEL: @select_icmp_and_8_ne_0_or_128(
-; CHECK-NEXT: ret i32 %x
-;
- %and = and i32 %x, 128
- %cmp = icmp eq i32 %and, 0
- %or = or i32 %x, 128
- %or.x = select i1 %cmp, i32 %x, i32 %or
- ret i32 %or.x
-}
-
-define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) {
-; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128(
+define i32 @select_icmp_trunc_8_ne_0_or_128_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128_alt(
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0
; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
@@ -174,16 +245,64 @@
ret i32 %sel
}
-define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
-; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9
-; CHECK-NEXT: ret i32 [[AND1]]
+define i32 @select_icmp_trunc_8_eq_0_or_128(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0
+; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
;
- %and = and i32 %x, 8
- %cmp = icmp eq i32 %and, 0
- %and1 = and i32 %x, -9
- %x.and1 = select i1 %cmp, i32 %x, i32 %and1
- ret i32 %x.and1
+ %trunc = trunc i32 %x to i8
+ %cmp = icmp slt i8 %trunc, 0
+ %or = or i32 %x, 128
+ %sel = select i1 %cmp, i32 %or, i32 %x
+ ret i32 %sel
+}
+
+define i32 @select_icmp_trunc_8_eq_0_or_128_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128_alt(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TRUNC]], -1
+; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[OR]]
+; CHECK-NEXT: ret i32 [[SEL]]
+;
+ %trunc = trunc i32 %x to i8
+ %cmp = icmp sgt i8 %trunc, -1
+ %or = or i32 %x, 128
+ %sel = select i1 %cmp, i32 %x, i32 %or
+ ret i32 %sel
+}
+
+define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i4 [[TRUNC]], -1
+; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[AND]]
+; CHECK-NEXT: ret i32 [[SEL]]
+;
+ %trunc = trunc i32 %x to i4
+ %cmp = icmp sgt i4 %trunc, -1
+ %and = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %x, i32 %and
+ ret i32 %sel
+}
+
+define i32 @select_icmp_trunc_8_eq_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8_alt(
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i4 [[TRUNC]], 0
+; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+;
+ %trunc = trunc i32 %x to i4
+ %cmp = icmp slt i4 %trunc, 0
+ %and = and i32 %x, -9
+ %sel = select i1 %cmp, i32 %and, i32 %x
+ ret i32 %sel
}
define i32 @select_icmp_trunc_8_ne_0_and_not_8(i32 %x) {
@@ -201,27 +320,16 @@
ret i32 %sel
}
-define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
-; CHECK-NEXT: ret i32 %x
-;
- %and = and i32 %x, 8
- %cmp = icmp eq i32 %and, 0
- %and1 = and i32 %x, -9
- %and1.x = select i1 %cmp, i32 %and1, i32 %x
- ret i32 %and1.x
-}
-
-define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) {
-; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8(
+define i32 @select_icmp_trunc_8_ne_0_and_not_8_alt(i32 %x) {
+; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8_alt(
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i4 [[TRUNC]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i4 [[TRUNC]], -1
; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 %x
; CHECK-NEXT: ret i32 [[SEL]]
;
%trunc = trunc i32 %x to i4
- %cmp = icmp slt i4 %trunc, 0
+ %cmp = icmp sgt i4 %trunc, -1
%and = and i32 %x, -9
%sel = select i1 %cmp, i32 %and, i32 %x
ret i32 %sel