[ARM] Cleanup ARM CGP isSupportedValue
isSupportedValue explicitly checked and accepted many types of value,
primarily for debugging reasons. Remove most of these checks and do a
bit of refactoring now that the pass is more stable. This also enables
ZExts to be sources, but this has very little practical benefit at the
moment extend instructions will still be introduced.
Differential Revision: https://reviews.llvm.org/D52080
llvm-svn: 342395
diff --git a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
index a1241b7..826efe9 100644
--- a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
+++ b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
@@ -165,6 +165,9 @@
if (!isa<Instruction>(V))
return false;
+ if (isa<SExtInst>(V))
+ return true;
+
unsigned Opc = cast<Instruction>(V)->getOpcode();
return Opc == Instruction::AShr || Opc == Instruction::SDiv ||
Opc == Instruction::SRem;
@@ -201,17 +204,10 @@
static bool isSource(Value *V) {
if (!isa<IntegerType>(V->getType()))
return false;
- // TODO Allow zext to be sources.
- if (isa<Argument>(V))
+ else if (isa<Argument>(V) || isa<LoadInst>(V) || isa<CallInst>(V))
return true;
- else if (isa<LoadInst>(V))
- return true;
- else if (isa<BitCastInst>(V))
- return true;
- else if (auto *Call = dyn_cast<CallInst>(V))
- return Call->hasRetAttr(Attribute::AttrKind::ZExt);
- else if (auto *Trunc = dyn_cast<TruncInst>(V))
- return isSupportedType(Trunc);
+ else if (isa<CastInst>(V))
+ return isSupportedType(V);
return false;
}
@@ -526,31 +522,22 @@
/// return value is zeroext. We don't allow opcodes that can introduce sign
/// bits.
bool ARMCodeGenPrepare::isSupportedValue(Value *V) {
+ if (generateSignBits(V))
+ return false;
+
+ // Disallow for simplicity.
+ if (isa<ConstantExpr>(V))
+ return false;
+
+ // Special case because they generate an i1, which we don't generally
+ // support.
if (isa<ICmpInst>(V))
return true;
- // Memory instructions
- if (isa<StoreInst>(V) || isa<GetElementPtrInst>(V))
- return true;
-
- // Branches and targets.
- if( isa<BranchInst>(V) || isa<SwitchInst>(V) || isa<BasicBlock>(V))
- return true;
-
- // Non-instruction values that we can handle.
- if ((isa<Constant>(V) && !isa<ConstantExpr>(V)) || isa<Argument>(V))
- return isSupportedType(V);
-
- if (isa<PHINode>(V) || isa<SelectInst>(V) || isa<ReturnInst>(V) ||
- isa<LoadInst>(V))
- return isSupportedType(V);
-
- // Truncs can be either sources or sinks.
- if (auto *Trunc = dyn_cast<TruncInst>(V))
- return isSupportedType(Trunc) || isSupportedType(Trunc->getOperand(0));
-
- if (isa<CastInst>(V) && !isa<SExtInst>(V))
- return isSupportedType(cast<CastInst>(V)->getOperand(0));
+ // Both ZExts and Truncs can be either sources and sinks. BitCasts are also
+ // sources and SExts are disallowed through their sign bit generation.
+ if (auto *Cast = dyn_cast<CastInst>(V))
+ return isSupportedType(Cast) || isSupportedType(Cast->getOperand(0));
// Special cases for calls as we need to check for zeroext
// TODO We should accept calls even if they don't have zeroext, as they can
@@ -559,17 +546,7 @@
return isSupportedType(Call) &&
Call->hasRetAttr(Attribute::AttrKind::ZExt);
- if (!isa<BinaryOperator>(V))
- return false;
-
- if (!isSupportedType(V))
- return false;
-
- if (generateSignBits(V)) {
- LLVM_DEBUG(dbgs() << "ARM CGP: No, instruction can generate sign bits.\n");
- return false;
- }
- return true;
+ return isSupportedType(V);
}
/// Check that the type of V would be promoted and that the original type is